Digi NS7520B-1-C36 Hardware Reference Manual page 72

N S 7 5 2 0 b o o t s t r a p i n i t i a l i z a t i o n
Address bit
ADDR[27]
ADDR[26]
ADDR[24:23]
ADDR[19:09]
ADDR[8:7]
ADDR[6:5]
ADDR[4:0]
Note:
6 0
Name
Endian configuration
CPU bootstrap
CS0/MMCR[19:18] setting
GEN_ID setting
PLL IS setting
PLL FS setting
PLL ND setting
The initial operating bus speed must be selected by adding pulldown to
the address lines that preset the ND value (ADDR[4:0]).
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Description
0 Little Endian configuration
1 Big Endian configuration
0 CPU disabled; GEN_BUSER=1
1 CPU enabled; GEN_BUSER=0
00 8-bit SRAM, 63 wait-states/b00
01 32-bit SRAM, 63 wait-states/b01
10 32-bit SRAM
11 16-bit SRAM, 63 wait-states/b11
GEN_ID=A[19:09], Default=
IS=A[8:7] Default=
, 'b10
FS=A[6:5] Default=
, 'b00
ND=A[4:0] Default=
, 'b01011
'h3ff