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NS9750B-A1
Errata
90000738, Rev F
Release date: September 2006
Use in conjunction with:
NS9750B-A1 Hardware
Reference, Rev. B
Part number: 90000737_B
Released: March 2006
Technical Support:
Phone: 1.877.912.3444
Web: techpubs@digi.com
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SPI slave data output high impedance control
•
UART gap timer
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UART CTS-related transmit data errors
•
USB OVR and USB PWR
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PCI arbiter senses false request
•
Ethernet receive data FIFO overflow (Ethernet
receiver stall)
•
1284 nibble ID negotiation
•
Linked Ethernet TX buffer descriptors do not work with
late collisions
w w w . d i g i . c o m
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Summary of Contents for Digi Errata NS9750B-A1
- Page 1 90000738, Rev F Release date: September 2006 Use in conjunction with: NS9750B-A1 Hardware Reference, Rev. B Part number: 90000737_B Released: March 2006 Technical Support: Phone: 1.877.912.3444 Web: techpubs@digi.com w w w . d i g i . c o m...
- Page 2 S P I s l a v e d a t a o u t p u t h i g h i m p e d a n c e c o n t r o l SPI slave data output high impedance control There is a problem that occurs in slave mode when there are other slaves on the SPI bus.
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Page 3: Uart Cts-Related Transmit Data Errors
U A R T C T S - r e l a t e d t r a n s m i t d a t a e r r o r s 0 OHM RESET RXD_mod[n] RXD[n] RXD[n] UART GAP Timer workaround 74LV74 74LV74... - Page 4 U S B O V R a n d U S B P W R The maximum bytes in each DMA buffer descriptor is limited to 16 bytes. The maximum skid rate can be up to 16 characters. The serial monitor thread is changed to handle the missing CTS interrupt. See the appropriate (6.0 or 6.3) NET+OS SW toolkit (on the Web) for the required software workarounds.
- Page 5 PCI arbiter senses false request For complete information and workarounds for this issue, see the related application note at http://www.digi.com/support/productdetl.jsp Ethernet receive data FIFO overflow (Ethernet receiver stall) The Ethernet receiver intermittently locks up in 100 Mbps half-duplex applications due to an overflow in the RX data FIFO.
- Page 6 L i n k e d E t h e r n e t T X b u f f e r d e s c r i p t o r s d o n ’ t w o r k w i t h l a t e c o l l i s i o n s Linked Ethernet TX buffer descriptors don’t work with late collisions If the Ethernet transmitter locks up when a late collision occurs while transmitting an Ethernet package consisting of multiple linked buffer descriptors, one of these situations occurs:...
- Page 8 Information in this manual is subject to change without notice and does not represent a commitment on the part of Digi International. Digi provides this document “as is,” without warranty of any kind, either expressed or implied, including, but not limited to, the implied warranties of fitness or merchantability for a particular purpose. Digi may make improvements and/or changes in this manual or in the product(s) and/or the program(s) described in this manual at any time.
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