Test Register - Digi NS7520B-1-C36 Hardware Reference Manual

Bits
D02
D01
D00
Table 67: PHY Support register bit assignment

Test register

Address: FF80 041C
31 30
15 14
Register bit assignment
Bits
D31:03
Table 68: Test register bit definition
Access Mnemonic Reset
N/A Reserved N/A
R/W JABBER 0
R/W BITMODE 0
29 28 27 26
13 12 11 10
Reserved
Access Mnemonic Reset
N/A Reserved N/A
Description
N/A
Enable Jabber protection
Jabber is the condition in which a transmitter is stuck on
longer than 50 ms, preventing other stations from
transmitting.
Set this bit to 1 to enable Jabber protection logic within the
PE10T in ENDEC mode.
Bit mode
Set this bit to 1 to configure the MAC to operate in ENDEC
mode. ENDEC mode is based on the
bit-clock rather than the nibble-clock, and changes decodes
(such as Excess Defer) to operate accordingly.
25 24 23 22 21
Reserved
9 8 7 6 5
Description
N/A
w w w . d i g i e m b e d d e d . c o m
E t h e r n e t M o d u l e
20 19 18 17 16
4 3 2 1 0
TBACK SPQ
TPAUSE
1 8 7