Ns7520 Errata; Clock Speed Errata Using Pll In Boundary Scan Mode; Uart Cts-Related Transmit Data Errors - Digi NS7520B-1-C36 Hardware Reference Manual

NS7520 errata

This section lists the known errata for the NS7520, describing each problem and, in
most cases, providing a workaround.

Clock speed errata using PLL in boundary scan mode

Refer to Figure 5 "PLL Mode hardware configuration" in Chapter 5 for more
information.

UART CTS-related transmit data errors

A problem occurs when the CTS flow control signal is de-asserted during the
Jan 17, 2006
BCLK that begins processing a new character. This problem causes the
previous character to be re-transmitted instead of getting the next character
from the transmit FIFO.
Software workarounds
Modify these bits in Serial Channel Control register A:
–
–
–
Non-DMA mode: Because FIFO can hold up to eight lines of 4 bytes each, the
maximum skid rate will be 32 characters.
To reduce the maximum skid rate to eight characters, the software is
changed to write 1 byte in each line.
In DMA mode, the skid rate can be up to the number of bytes transmitted in
1 tick.
The serial monitor thread is changed to handle the missing CTS interrupt.
Set the CTSTX bit (bit 23) to 0 to disable hardware-controlled CTSTX.
Set the ERXCTS bit (bit 4) to enable the software CTS signal change
interrupt.
Update the serial transmit ISR to handle the CTS signal change.
w w w . d i g i e m b e d d e d . c o m
N S 7 5 2 0 E r r a t a
3 0 3