Digi NS7520B-1-C36 Hardware Reference Manual page 191

Register bit assignment
Bits Access Mnemonic
D31:15 N/A Reserved
D14 R/W EDEFER
D13 R/W BACKP
D12 R/W NOBO
D11:10 N/A Reserved
D09 R/W LONGP
D08 R/W PUREP
Table 61: MAC Configuration Register 2 bit definition
Reset Description
N/A N/A
0 Excess Deferral
1 Allows the MAC to defer to carrier indefinitely, per
the 802.3u standard.
0 The MAC aborts when the excessive deferral limit is
reached. The MAC provides feedback to the host
system (through a transmit abort condition defined in
the Transmit Status register (see "TXAED" on page
170).
0 Backpressure/NO back off
0 After a collision, the MAC waits a random amount of
time to retransmit packets ("back off").
1 After a collision, the MAC immediately retransmits
packets without backoff. This reduces the chance of
further collisions and ensures that transmit packets are
sent.
0 No back off
When this bit is set to 1, the MAC immediately retransmits
after a collision, rather than using the binary exponential
back off algorithm defined in the 802.3u standard.
N/A N/A
0 Long preamble enforcement
1 The MAC allows only those receive packets that
contain preamble fields less than 12 bytes in length.
0 The MAC allows any length preamble, as defined in
the 802.3u standard.
0 Pure preamble enforcement
1 The MAC verifies the preamble's content to ensure it
contains 'h55 and is error-free. A packet with errors in
the preamble is discarded.
0 There is no preamble checking.
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