Digi NS7520B-1-C36 Hardware Reference Manual page 332

Ethernet receive and transmit
Ethernet Receive Status register
Ethernet receiver considerations
Ethernet timing
Ethernet Transmit Status register
Ethernet transmitter considerations
exception entry/exit summary
exceptions
exiting an exception
external CAM filtering
external DMA configuration
external DMA timing
external multiplexer
external oscillator mode hardware
external oscillator vs. internal PLL
external peripheral DMA support
external reset circuit source
F
fast interrupt request exception.
4
I n d e x -
interrupts 40
290 - 291
abort 32 , 35
data abort 32 , 35
definition 31
detail 34 - 36
FIRQ 32 , 36
IRQ 32 , 36
prefetch abort 32 , 35
priorities 32
reset 32 , 34
summary 32
SWI instruction 32
SWI interrupt 35
undefined 32 , 34
37
153
147
294 - 296
108
configuration 50
circuit 49
exception.
FIFO management
receive FIFO interface
173
SPI 212
146
transmit FIFO interface
FIFO overrun condition
168
FIRQ
80
145
FIRQ exception
38
FIRQ lines
fly-by mode
DMA buffer descriptor
fly-by transfers
FP DRAM
burst cycles
FP DRAM controller
single cycle read/write
FP DRAM timing
G
GEN module
configuration
hardware initialization
Interrupt Enable Clear
Interrupt Enable register
Interrupt Enable Set
Interrupt Status Enabled
Interrupt Status Raw
interrupts
PORTA configuration
PORTA Configuration register
PORTC configuration
146 - 148
PORTC Configuration register
59
Software Service register
System Control register
System Status register
Timer Control registers
See FIRQ
Timer Status register
213
212
146
32 , 36
39
131
129
86
111
109 - 111
110
283 - 289
61 - 83
62
62
81
81
81
81
81
80 - 83
75
73
78
77
69
63
68
70
73