Dma Channel Assignments; Efe Configuration - Digi NS7520B-1-C36 Hardware Reference Manual

D M A c h a n n e l a s s i g n m e n t s

DMA channel assignments

One DMA channel is dedicated to Ethernet receive and one DMA channel is dedicated
to Ethernet transmit. The Ethernet receiver has four DMA subchannels, which support
the receive buffer descriptor selection feature (see "DMA buffer descriptor,"
beginning on page 130).
The Ethernet receiver is assigned DMA channel 1 (1A, 1B, 1C, and 1D).
The Ethernet transmitter is assigned DMA channel 2.

EFE configuration

Table 52 shows the Ethernet front-end register map. All registers are 32 bits unless
otherwise noted.
Note:
Address
FF80 0000
FF80 0004
FF80 0008
FF80 000C
FF80 0010
FF80 0014
FF80 0400
FF80 0404
FF80 0408
FF80 040C
FF80 0410
Table 52: EFE register map
1 5 6
Reading or writing the MAC configuration registers (address locations
0xFF80 0400 through 0xFF80 05DC) is unreliable without valid clocks on
the TXCLK and RXCLK input pins.
Register
EGCR
EGSR
FIFO
FIFOL
ETSR
ERSR
MAC1
MAC2
IPGT
IPGR
CLRT
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Register description
Ethernet General Control register
Ethernet General Status register
Ethernet FIFO Data register
Ethernet FIFO Data Register Last
Ethernet Transmit Status register
Ethernet Receive Status register
MAC Configuration Register 1
MAC Configuration Register 2
Back-to-Back Inter-Packet-Gap register
Non-Back-to-Back Inter-Packet-Gap register
Collision Window/Retry register