Digi NS7520B-1-C36 Hardware Reference Manual page 334

M
MAC Configuration register 1
MAC Configuration register 2
MAC module
MASK field
Maximum Frame register
media access controller.
MEM module
memory controller module.
memory management unit (MMU)
Memory Module Configuration register
memory space
memory timing control fields
memory-to-memory mode
6
I n d e x -
154 - 155
88 , 97
185
See
85 - 125
A27 and A26 bit settings
BSIZE configuration
118
Chip Select Base Address register
Chip Select Option Register A
Chip Select Option Register B
configuration 87
DRAM module 109
EDO DRAM controller 109 - 111
FP DRAM controller 109 - 111
hardware initialization 86
Memory Module Configuration
register 89
NS7520 DRAM address
multiplexing 105 - 109
NS7520 SDRAM interconnect
peripheral page burst size
SDRAM 111 - 124
Mode register 119
read cycles 120
write cycles 122
SRAM controller 102 - 105
See
module.
89
DMA buffer descriptor 131
external transfers 147
memory-to-memory operation
MII Management Address register
176
MII Management Command register
178
MII Management Configuration
MII Management Indicators register
MII Management Read Data register
MAC.
MII Management Write Data register
multicast hash table entries
92
92
N
97
NET+ARM
101
NO CONNECT
definition
pins
Non-Back-to-Back Inter-Packet-Gap
NS7520
ARM debugger
bootstrap initialization
chip select controller
clock module block diagrams
112
DRAM address multiplexing
124
Ethernet interface MAC
features
general-purpose I/O
JTAG test
NO CONNECT pins
operating frequency
MEM
packaging
36 pinout
89 power supply
SDRAM interconnect
97 , 101 system bus interface
system clock and reset
system mode
130
register 189
200
1
11
21
register 183
26
59
16
105 - 109
18
1 - 6
21
26
21
6
7 - 9
7 - 28
28
112
12
24
25
192
191
195
194
193
50