Symbol
BG_
BUSY_
Table 2: System bus interface pinout
Signal descriptions
Mnemonic
Signal
BCLK
Bus clock
ADDR[27:0]
Address bus
DATA[31:0]
Data bus
TS_
Transfer start
BE_
Byte enable
TA_
Transfer acknowledge
Table 3: System bus interface signal description
Pin
I/O
OD
Description
C7
NO CONNECT
B7
NO CONNECT
Description
Provides the bus clock. All system bus interface signals are
referenced to the BCLK signal.
Identifies the address of the peripheral being addressed by
the current bus master. The address bus is bi-directional.
Provides the data transfer path between the NS7520 and
external peripheral devices. The data bus is bi-directional.
Recommendation: Less than x32 (S)DRAM/SRAM
memory configurations. Unconnected data bus pins will
float during memory read cycles. Floating inputs can be a
source of wasted power.
For other than x32 DRAM/SRAM configurations, the
unused data bus signals should be pulled up.
NO CONNECT
Identifies which 8-bit bytes of the 32-bit data bus are active
during any given system bus memory cycle. The BE_
signals are active low and
bi-directional.
Indicates the end of the current system bus memory cycle.
This signal is driven to 1 prior to
tri-stating its driver.
TA_ is bi-directional.
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P i n o u t a n d P a c k a g i n g
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