Setting The Chip Select Address Range - Digi NS7520B-1-C36 Hardware Reference Manual

M E M m o d u l e c o n f i g u r a t i o n
Address
FFC0 0000
FFC0 0010
FFC0 0014
FFC0 0018
FFC0 0020
FFC0 0024
FFC0 0028
FFC0 0030
FFC0 0034
FFC0 0038
FFC0 0040
FFC0 0044
FFC0 0048
FFC0 0050
FFC0 0054
FFC0 0058
Table 35: Memory controller register map

Setting the chip select address range

Each chip select should be configured to respond to a different portion of the
memory map. Do this by setting the appropriate fields in the Chip Select Base Address
and Chip Select Option registers.
The BASE field in the Chip Select Base Address register defines the starting address of
the chip select address space. The MASK field identifies those address bits, from
A[31:12], that are used in the address decoding function.
A 1 in the MASK field indicates that the associated address bit is to be used
in the decoding process.
8 8
Mnemonic
MMCR
BAR0
OR0A
OR0B
BAR1
OR1A
OR1B
BAR2
OR2A
OR2B
BAR3
OR3A
OR3B
BAR4
OR4A
OR4B
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Register
Memory Module Configuration register
Chip Select 0 Base Address register
Chip Select 0 Option Register A
Chip Select 0 Option Register B
Chip Select 1 Base Address register
Chip Select 1 Option Register A
Chip Select 1 Option Register B
Chip Select 2 Base Address register
Chip Select 2 Option Register A
Chip Select 2 Option Register B
Chip Select 3 Base Address register
Chip Select 3 Option Register A
Chip Select 3 Option Register B
Chip Select 4 Base Address register
Chip Select 4 Option Register A
Chip Select 4 Option Register B