Ramp (Ramp Control) - IDEC FC4A-C10R2 User Manual

RAMP (Ramp Control)

RAMP
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Note: The RAMP instruction can be used only once in a user program. When RAMP is used with reversible control disabled,
unused output Q1 can be used for another pulse instruction PULS2, PWM2, or ZRN2 or ordinary output.
Applicable CPU Modules
FC4A-C10R2/C FC4A-C16R2/C
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Valid Operands
Operand
S1 (Source 1)
D1 (Destination 1)
Source operand S1 (control register) uses 11 data registers starting with the operand designated as S1. Data registers D0
through D1289 and D2000 through D7989 can be designated as S1. For details, see the following pages.
Destination operand D1 (status relay) uses 4 internal relays starting with the operand designated as D1. Internal relays M0
through M1270 can be designated as D1. The least significant digit of the internal relay number designated as D1 must be
0, otherwise the RAMP instruction does not operate correctly. Special internal relays cannot be designated as D1. For
details, see page 6-2.
Source Operand S1 (Control Register)
Store appropriate values to data registers starting with the operand designated as S1 before executing the RAMP instruc-
tion as required, and make sure that the values are within the valid range. Operands S1+8 through S1+10 are for read only.
Operand
S1+0 Operation mode
S1+1 Steady pulse frequency
S1+2 Initial pulse frequency
Frequency change rate
S1+3
Frequency change time
When input is on, the RAMP instruction sends out a predetermined number of
S1 D1
output pulses whose frequency changes in a trapezoidal pattern determined by
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source operand S1. After starting the RAMP instruction, the output pulse fre-
quency increases linearly to a predetermined constant value, remains constant
at this value for some time, and then decreases linearly to the original value.
The frequency change rate or the frequency change time can be selected for
acceleration and deceleration of the movement.
When input is off, the pulse output remains off. When input is turned on again,
the RAMP instruction starts a new cycle of generating output pulses.
FC4A-C24R2/C
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Function
Control register
Status relay
Function
0: 10 to 1,000 Hz
1: 100 to 10,000 Hz
2: 1,000 to 20,000 Hz
3: 10 to 20,000 Hz (upgraded CPU only)
When S1+0 (operation mode) = 0 or 1: 1 to 100 (%)
(1% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 2: 1 to 20 (×5%)
(5% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 3: 10 to 20,000 (Hz)
When S1+0 (operation mode) = 0 or 1: 1 to 100 (%)
(1% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 2: 1 to 20 (×5%)
(5% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 3: 10 to 20,000 (Hz)
When S1+0 (operation mode) = 0 or 1: 1 to 100 (%)
(1% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 2: 1 to 20 (×5%)
(5% to 100% of the maximum frequency of selected mode S1+0)
When S1+0 (operation mode) = 3: 10 to 10,000 (ms)
« FC4A M
FC4A-D20K3/S3
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I Q
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Description
S U ' M
ICRO MART SER S ANUAL
20: P
ULSE
FC4A-D20RK1/RS1 & FC4A-D40K3/S3
X
M R T C D Constant
X
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I
NSTRUCTIONS
Repeat
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R/W
R/W
R/W
R/W
R/W
20-13