IDEC FC4A-C10R2 User Manual page 125

Internal Relay 'Keep' Designation
All Internal Relays Clear:
All Internal Relays Keep:
Internal Relay Keep Range: A designated area of internal relays are maintained at startup. Enter the start "keep"
Shift Register 'Keep' Designation
All Shift Registers Clear:
All Shift Registers Keep:
Shift Register Keep Range:
Counter 'Clear' Designation
All Counters Keep:
All Counters Clear:
Counter Clear Range:
Data Register 'Clear' Designation
All Data Registers Keep:
All Data Registers Clear:
Data Register Clear Range: A designated area of data register values are cleared at startup. Enter the start "clear"
All internal relay statuses are cleared at startup (default).
All internal relay statuses are maintained at startup.
number in the left field and the end "keep" number in the right field. The start "keep" num-
ber must be smaller than or equal to the end "keep" number.
Valid internal relay numbers are M0 through M317 (FC4A-C10R2 and FC4A-C10R2C CPU
modules) or M0 through M1277 (other CPU modules). Special internal relays and AS-Inter-
face internal relays cannot be designated.
Start Keep Number
When a range of M50 through M100 is designated as shown in the example above, M50
through M100 are keep types, M0 through M47 and M101 through M1277 are clear
types.
All shift register bit statuses are cleared at startup (default).
All shift register bit statuses are maintained at startup.
A designated area of shift register bits are maintained at startup. Enter the start "keep"
number in the left field and the end "keep" number in the right field. The start "keep" num-
ber must be smaller than or equal to the end "keep" number.
Valid shift register bit numbers are R0 through R63 (FC4A-C10R2 and FC4A-C10R2C CPU
modules) or R0 through R127 (other CPU modules).
When a range of R17 through R32 is designated, R17 through R32 are keep types, R0
through R16 and R33 through R127 are clear types.
All counter current values are maintained at startup (default).
All counter current values are cleared at startup.
A designated area of counter current values are cleared at startup. Enter the start "clear"
number in the left field and the end "clear" number in the right field. The start "clear" num-
ber must be smaller than or equal to the end "clear" number.
Valid counter numbers are C0 through C31 (FC4A-C10R2 and FC4A-C10R2C CPU modules)
or C0 through C99 (other CPU modules).
When a range of C0 through C10 is designated, C0 through C10 are clear types, and C11
through C99 are keep types.
All data register values are maintained at startup (default).
All data register values are cleared at startup.
number in the left field and the end "clear" number in the right field. The start "clear" num-
ber must be smaller than or equal to the end "clear" number.
Valid data register numbers are D0 through D399 (FC4A-C10R2 and FC4A-C10R2C CPU
modules) or D0 through D1299 (others). Special data registers, expansion data registers,
and AS-Interface data registers cannot be designated. All expansion data registers are
keep types.
When a range of D100 through D1299 is designated, D0 through D99 are keep types, and
D100 through D1299 are clear types.
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