IDEC FC4A-C10R2 User Manual page 208

Fc4a series microsmart micro programmable logic controller

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MCS and MCR (Master Control Set and Reset), continued

Multiple Usage of MCS instructions

Ladder Diagram

This master control circuit will give priority to I1, I3, and I5, in that order.

When input I1 is off, the ﬁrst MCS is executed so that subsequent inputs I2 through I6 are forced off.

When input I1 is on, the ﬁrst MCS is not executed so that the following program is executed according to the actual input

statuses of I2 through I6.

When I1 is on and I3 is off, the second MCS is executed so that subsequent inputs I4 through I6 are forced off.

When both I1 and I3 are on, the ﬁrst and second MCSs are not executed so that the following program is executed accord-

ing to the actual input statuses of I4 through I6.

Counter and Shift Register in Master Control Circuit

Ladder Diagram

Program List

When input I1 is on, the MCS is not executed so that the counter and shift register are exe-

cuted according to actual statuses of subsequent inputs I2 through I4.

When input I1 is off, the MCS is executed so that subsequent inputs I2 through I4 are

When input I1 is turned on while input I2 is on, the counter and shift register pulse inputs

are turned on as shown below.

Timing Chart

Counter Pulse Input

Shift Register Pulse Input

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