IDEC FC4A-C10R2 User Manual

Fc4a series microsmart micro programmable logic controller

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FC9Y-B812

FC4A SERIES

Micro Programmable

Logic Controller

User's Manual

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Summary of Contents for IDEC FC4A-C10R2

Page 1 FC9Y-B812 FC4A SERIES Micro Programmable Logic Controller User’s Manual...
Page 2 Twelve new functions have been implemented in the FC4A CPU modules. Availability of the twelve new MicroSmart functions depends on the model and system program version of the CPU modules as listed below: All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C...
Page 3 MicroSmart • All modules are manufactured under IDEC’s rigorous quality control system, but users must add a backup or MicroSmart failsafe provision to the control system when using the in applications where heavy damage or personal injury...
Page 4 Under no circumstances shall IDEC Corporation be held liable or responsible for indirect or consequential damages resulting from the use of or the application of IDEC PLC components, individually or in combination with other equipment. All persons using these components must be willing to accept responsibility for choosing the correct component to suit their application and for choosing an application appropriate for the component, individually or in combination with other equipment.
Page 5 Revision Record The table below summarizes the changes to this manual since last printing of FC9Y-B812-0A in June, 2006. Revision Description of Change Page Analog I/O Modules 2-43, 6-5, Four analog input and output modules are added. (Ladder Refresh Type) 24-1 AS-Interface Master Module 2-57, 6-5,...
Page 6 « FC4A M ’ » REFACE ICRO MART ANUAL...
Page 7: Table Of Contents
ABLE OF ONTENTS HAPTER ENERAL NFORMATION About the MicroSmart ..........1-1 Features .
Page 8 ABLE OF ONTENTS HAPTER PECIAL UNCTIONS Function Area Settings ..........5-1 Stop Input and Reset Input .
Page 9: Hapter
ABLE OF ONTENTS HAPTER DVANCED NSTRUCTIONS Advanced Instruction List ......... . . 8-1 Advanced Instruction Applicable CPU Modules .
Page 10 ABLE OF ONTENTS HAPTER ONVERSION NSTRUCTIONS HTOB (Hex to BCD) ..........14-1 BTOH (BCD to Hex) .
Page 11 ABLE OF ONTENTS HAPTER OORDINATE ONVERSION NSTRUCTIONS XYFS (XY Format Set) ..........19-1 CVXTY (Convert X to Y) .
Page 12 ABLE OF ONTENTS HAPTER OMPUTER OMMUNICATION Computer Link System Setup (1:N Computer Link System) ....26-1 Programming WindLDR ..........26-2 Monitoring PLC Status .
Page 13: About The Microsmart
Windows PC. Since can load existing user MicroSmart WindLDR WindLDR programs made for IDEC’s previous PLCs such as all FA series, , and MICRO-1 MICRO MICRO OpenNet Controller your software assets can be used in the new control system.
Page 14: Special Functions
1: G ENERAL NFORMATION HMI Module (all CPU modules) An optional HMI module can be installed on any all-in-one type CPU module, and also on the HMI base module mounted next to any slim type CPU module. The HMI module makes it possible to manipulate the RAM data in the CPU module without using the Online menu options in WindLDR HMI module functions include:...
Page 15 1: G ENERAL NFORMATION Catch Input Four inputs can be used as catch inputs. The catch input makes sure to receive short input pulses (rising pulse of 40 µs or falling pulse of 150 µs minimum) from sensors without regard to the scan time. Interrupt Input Four inputs can be used as interrupt inputs.
Page 16: System Setup
1: G ENERAL NFORMATION System Setup This section illustrates system setup conﬁgurations for using powerful communication functions of the MicroSmart User Communication and Modem Communication System The all-in-one 16- and 24-I/O type CPU modules have port 1 for RS232C communication and port 2 connec- MicroSmart tor.
Page 17 1: G ENERAL NFORMATION Computer Link System When the MicroSmart is connected to a computer, operating status and I/O status can be monitored on the computer, data in the CPU module can be monitored or updated, and user programs can be downloaded and uploaded. When an optional RS485 communication adapter is installed on the port 2 connector of the all-in-one 16- or 24-I/O type CPU modules or when an optional RS485 communication module is mounted with any slim type CPU modules, a maximum of 32 CPU modules can be connected to one computer in the 1:N computer link system.
Page 18 1: G ENERAL NFORMATION Data Link System With an optional RS485 communication adapter installed on the port 2 connector, one 16- or 24-I/O type CPU module at the master station can communicate with 31 slave stations through the RS485 line to exchange data and perform distrib- uted control effectively.
Page 19 ENERAL NFORMATION Operator Interface Communication System MicroSmart can communicate with IDEC’s HG series operator interfaces through RS232C port 1 and port 2. Optional cables are available for connection between the and HG series operator interfaces. When installing MicroSmart an optional RS232C communication adapter on the all-in-one type CPU module or an optional RS232C communication module on the slim type CPU module, two operator interfaces can be connected to one CPU module.
Page 20 AS-Interface line. SwitchNet is an IDEC trademark for pushbuttons, pilot lights, and other control units capable of direct connection to the AS-Interface. SwitchNet devices are completely compatible with AS-Interface Ver. 2.1.
Page 21: Specifications
Every all-in-one type CPU module has a cartridge connector to install an optional memory cartridge or clock cartridge. CPU Module Type Numbers (All-in-One Type) Power Voltage 10-I/O Type 16-I/O Type 24-I/O Type 100 -240V AC (50/60 Hz) FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 24V DC FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C Parts Description (All-in-One Type)
Page 22 2: M ODULE PECIFICATIONS (1) Power Supply Terminals Connect power supply to these terminals. Power voltage 100-240V AC or 24V DC. See page 3-16. (2) Sensor Power Terminals (AC power type only) For supplying power to sensors (24V DC, 250mA). These terminals can be used for supplying power to input circuits. Use the sensor power supply only for supplying power to input devices connected to the MicroSmart (3) Input Terminals...
Page 23 160 mA (24V DC) 190 mA (24V DC) 360 mA (24V DC) FC4A-C10R2: 30VA (264V AC), 20VA (100V AC) (CPU module*) FC4A-C16R2: 31VA (264V AC), 22VA (100V AC) (CPU module*) AC Power Type FC4A-C24R2: 40VA (264V AC), 33VA (100V AC) (CPU module* + 4 I/O modules) Maximum *The CPU module power consumption includes 250mA sensor power.
Page 24 2: M ODULE PECIFICATIONS Function Speciﬁcations (All-in-One Type CPU Module) CPU Module Speciﬁcations FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 CPU Module FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C 4,800 bytes 15,000 bytes 27,000 bytes Program Capacity (800 steps) (2,500 steps) (4,500 steps) Expandable I/O Modules — —...
Page 25 2: M ODULE PECIFICATIONS Communication Function Port 2 (RS232C) Port 2 (RS485) Communication Port Port 1 (RS232C) Communication Adapter Communication Adapter Standards EIA RS232C EIA RS232C EIA RS485 Computer link: 19,200 bps Maximum Baud Rate 19,200 bps 19,200 bps Data link: 38,400 bps Maintenance Communication Possible...
Page 26 26.4 age 28.8V DC as indicated with line Inputs I2 to I15 (1) 55°C (2). When using the FC4A-C10R2/C, all 28.8 I/Os can be turned on simultaneously ON Area at 55°C, input voltage 28.8V DC. For other possible mounting direc- tions, see page 3-12.
Page 27 2: M ODULE PECIFICATIONS Relay Output Speciﬁcations (All-in-One Type CPU Module) FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 CPU Module FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C No. of Outputs 4 points 7 points 10 points COM0 3 NO contacts 4 NO contacts 4 NO contacts COM1 1 NO contact...
Page 28 2: M ODULE PECIFICATIONS CPU Module Terminal Arrangement (All-in-One Type) The input and output terminal arrangements of the all-in-one type CPU modules are shown below. AC Power Type CPU Module FC4A-C10R2 Sensor Power Terminals Input Terminals +24V DC IN DC OUT 100-240VAC Ry.OUT...
Page 29 2: M ODULE PECIFICATIONS DC Power Type CPU Module FC4A-C10R2C Input Terminals DC IN 24VDC Ry.OUT Ry.OUT – DC Power Terminals COM0 COM1 3 Output Terminals FC4A-C16R2C Input Terminals DC IN 24VDC Ry.OUT Ry.OUT Ry.OUT – DC Power Terminals COM0 COM1 4 COM2 6 Output Terminals...
Page 30 2: M ODULE PECIFICATIONS I/O Wiring Diagrams (All-in-One Type CPU Module) The input and output wiring examples of the CPU modules are shown below. For wiring precautions, see pages 3-13 through 3-16. AC Power Type CPU Module DC Power Type CPU Module DC Source Input Wiring DC Source Input Wiring External...
Page 31: Cpu Modules (Slim Type)
2: M ODULE PECIFICATIONS CPU Modules (Slim Type) Slim type CPU modules are available in 20- and 40-I/O types. The 20-I/O type has 12 input and 8 output terminals, and the 40-I/O type has 24 input and 16 output terminals. The FC4A-D20RK1 and FC4A-D20RS1 have 2 transistor outputs used for high-speed outputs and pulse outputs in addition to 10 relay outputs.
Page 32 2: M ODULE PECIFICATIONS (1) Power Supply Terminals Connect power supply to these terminals. Power voltage 24V DC. See page 3-17. (2) I/O Terminals For connecting input and output signals. The input terminals accept both sink and source 24V DC input signals. Tran- sistor and relay output types are available.
Page 33 2: M ODULE PECIFICATIONS General Speciﬁcations (Slim Type CPU Module) Normal Operating Conditions FC4A-D20K3 FC4A-D20RK1 FC4A-D40K3 CPU Module FC4A-D20S3 FC4A-D20RS1 FC4A-D40S3 Operating Temperature 0 to 55°C (operating ambient temperature) Storage Temperature –25 to +70°C Relative Humidity 10 to 95% (non-condensing) Pollution Degree 2 (IEC 60664-1) Degree of Protection...
Page 34 2: M ODULE PECIFICATIONS Function Speciﬁcations (Slim Type CPU Module) CPU Module Speciﬁcations FC4A-D20K3 FC4A-D20RK1 FC4A-D40K3 CPU Module FC4A-D20S3 FC4A-D20RS1 FC4A-D40S3 27,000 bytes 31,200 bytes (5,200 steps) Program Capacity (4,500 steps) 64,500 bytes (10,750 steps) (Note 1, Note 2) Expandable I/O Modules 7 modules Input I/O Points...
Page 35 2: M ODULE PECIFICATIONS Communication Function Port 2 (RS232C) Port 2 (RS485) Communication Port Port 1 (RS232C) Communication Module Communication Module Communication Adapter Communication Adapter Standards EIA RS232C EIA RS232C EIA RS485 Computer link: 19,200 bps Maximum Baud Rate 19,200 bps 19,200 bps User comm.: 19,200 bps...
Page 36 2: M ODULE PECIFICATIONS DC Input Speciﬁcations (Slim Type CPU Module) FC4A-D20K3 FC4A-D20RK1 FC4A-D40K3 CPU Module FC4A-D20S3 FC4A-D20RS1 FC4A-D40S3 12 points 12 points 24 points Input Points and Common Lines in 1 common line in 1 common line in 2 common lines Terminal Arrangement See CPU Module Terminal Arrangement on pages 2-19 through 2-22.
Page 37 2: M ODULE PECIFICATIONS Transistor Sink and Source Output Speciﬁcations (Slim Type CPU Module) FC4A-D20K3 FC4A-D20S3 CPU Module FC4A-D20RK1 FC4A-D20RS1 FC4A-D40K3 FC4A-D40S3 Output Type Sink output Source output FC4A-D20K3/S3: 8 points in 1 common line Output Points and Common Lines FC4A-D20RK1/RS1: 2 points in 1 common line FC4A-D40K3/S3:...
Page 38 2: M ODULE PECIFICATIONS Relay Output Speciﬁcations (Slim Type CPU Module) CPU Module FC4A-D20RK1 FC4A-D20RS1 No. of Outputs 8 points including 2 transistor output points COM0 (2 points transistor sink output) (2 points transistor source output) COM1 3 NO contacts Output Points per Common Line COM2 2 NO contacts...
Page 39 2: M ODULE PECIFICATIONS CPU Module Terminal Arrangement and I/O Wiring Diagrams (Slim Type) FC4A-D20K3 (20-I/O Transistor Sink Output Type CPU Module) Applicable Connector: FC4A-PMC26P (not supplied with the CPU module) Source Input Wiring Sink Output Wiring Terminal No. Input Terminal No.
Page 40 2: M ODULE PECIFICATIONS FC4A-D20RK1 (20-I/O Relay and Transistor Sink High-speed Output Type CPU Module) Applicable Terminal Blocks: TB1 (Left Side) FC4A-PMT13P (supplied with the CPU module) TB2 (Right Side) FC4A-PMTK16P (supplied with the CPU module) Source Input Wiring Sink Output Wiring Terminal No.
Page 41 2: M ODULE PECIFICATIONS FC4A-D40K3 (40-I/O Transistor Sink Output Type CPU Module) Applicable Connector: FC4A-PMC26P (not supplied with the CPU module) Source Input Wiring Sink Output Wiring Terminal No. Input Terminal No. Output Load Fuse 2-wire Sensor – COM(–) – Fuse –...
Page 42 2: M ODULE PECIFICATIONS FC4A-D40S3 (40-I/O Transistor Source Output Type CPU Module) Applicable Connector: FC4A-PMC26P (not supplied with the CPU module) Sink Input Wiring Source Output Wiring Terminal No. Input Terminal No. Output Load Fuse 2-wire Sensor + – COM(+) Fuse + –...
Page 43: Input Modules
2: M ODULE PECIFICATIONS Input Modules Digital input modules are available in 8-, 16-, and 32-point DC input modules and an 8-point AC input module with a screw terminal block or plug-in connector for input wiring. All DC input modules accept both sink and source DC input signals.
Page 44 2: M ODULE PECIFICATIONS DC Input Module Speciﬁcations Type No. FC4A-N08B1 FC4A-N16B1 FC4A-N16B3 FC4A-N32B3 8 points in 1 16 points in 1 16 points in 1 32 points in 2 Input Points and Common Lines common line common line common line common lines Terminal Arrangement See Input Module Terminal Arrangement on pages 2-26 through 2-28.
Page 45 2: M ODULE PECIFICATIONS AC Input Module Speciﬁcations Type No. FC4A-N08A11 Input Points and Common Lines 8 points in 2 common lines Terminal Arrangement See Input Module Terminal Arrangement on page 2-29. Rated Input Voltage 100 to 120V AC (50/60 Hz) Input Voltage Range 85 to 132V AC Rated Input Current...
Page 46 2: M ODULE PECIFICATIONS DC Input Module Terminal Arrangement and Wiring Diagrams FC4A-N08B1 (8-point DC Input Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT10P (supplied with the input module) Source Input Wiring Sink Input Wiring DC.IN Terminal No. Input Terminal No.
Page 47 2: M ODULE PECIFICATIONS FC4A-N16B3 (16-point DC Input Module) — Connector Type Applicable Connector: FC4A-PMC20P (not supplied with the input module) Source Input Wiring Terminal No. Input Terminal No. Input 2-wire Sensor 2-wire Sensor – + – – – 24V DC 24V DC Sink Input Wiring Terminal No.
Page 48 2: M ODULE PECIFICATIONS FC4A-N32B3 (32-point DC Input Module) — Connector Type Applicable Connector: FC4A-PMC20P (not supplied with the input module) • COM0 terminals are connected together internally. • COM1 terminals are connected together internally. • COM0 and COM1 terminals are not connected together internally. •...
Page 49 2: M ODULE PECIFICATIONS AC Input Module Terminal Arrangement and Wiring Diagrams FC4A-N08A11 (8-point AC Input Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT11P (supplied with the input module) Terminal No. Output AC.IN COM0 COM0 COM1 COM1 • Two COM terminals are not connected together internally. •...
Page 50: Output Modules
2: M ODULE PECIFICATIONS Output Modules Digital output modules are available in 8- and 16-point relay output modules, 8-, 16- and 32-point transistor sink output modules, and 8-, 16- and 32-point transistor source output modules with a screw terminal block or plug-in connector for output wiring.
Page 51 2: M ODULE PECIFICATIONS Relay Output Module Speciﬁcations Type No. FC4A-R081 FC4A-R161 Output Points and Common Lines 8 NO contacts in 2 common lines 16 NO contacts in 2 common lines Terminal Arrangement See Relay Output Module Terminal Arrangement on page 2-32. 2A per point Maximum Load Current 7A per common line...
Page 52 2: M ODULE PECIFICATIONS Relay Output Module Terminal Arrangement and Wiring Diagrams FC4A-R081 (8-point Relay Output Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT11P (supplied with the output module) Terminal No. Output Fuse Load Ry.OUT – Fuse Fuse Fuse –...
Page 53 2: M ODULE PECIFICATIONS Transistor Sink Output Module Speciﬁcations Type No. FC4A-T08K1 FC4A-T16K3 FC4A-T32K3 Output Type Transistor sink output 8 points 16 points 32 points Output Points and Common Lines in 1 common line in 1 common line in 2 common lines See Transistor Sink Output Module Terminal Arrangement on pages 2-34 Terminal Arrangement and 2-35.
Page 54 2: M ODULE PECIFICATIONS Transistor Sink Output Module Terminal Arrangement and Wiring Diagrams FC4A-T08K1 (8-point Transistor Sink Output Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT10P (supplied with the output module) Tr.OUT Terminal No. Output Fuse Load Fuse + – COM(–) COM(–) •...
Page 55 2: M ODULE PECIFICATIONS FC4A-T32K3 (32-point Transistor Sink Output Module) — Connector Type Applicable Connector: FC4A-PMC20P (not supplied with the output module) Terminal No. Output Terminal No. Output Fuse Load Load Fuse COM0(–) COM0(–) + – – Terminal No. Output Terminal No.
Page 56 2: M ODULE PECIFICATIONS Transistor Source Output Module Speciﬁcations Type No. FC4A-T08S1 FC4A-T16S3 FC4A-T32S3 Output Type Transistor source output 8 points 16 points 32 points Output Points and Common Lines in 1 common line in 1 common line in 2 common lines See Transistor Source Output Module Terminal Arrangement on pages 2-37 Terminal Arrangement and 2-38.
Page 57 2: M ODULE PECIFICATIONS Transistor Source Output Module Terminal Arrangement and Wiring Diagrams FC4A-T08S1 (8-point Transistor Source Output Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT10P (supplied with the output module) Tr.OUT Terminal No. Output Load Fuse – COM(+) COM(+) –V –V...
Page 58 2: M ODULE PECIFICATIONS FC4A-T32S3 (32-point Transistor Source Output Module) — Connector Type Applicable Connector: FC4A-PMC20P (not supplied with the output module) Terminal No. Output Terminal No. Output Fuse Load Load Fuse COM0(+) COM0(+) – + – –V0 –V0 Terminal No. Output Terminal No.
Page 59: Mixed I/O Modules
2: M ODULE PECIFICATIONS Mixed I/O Modules The 4-in/4-out mixed I/O module has 4-point DC sink/source inputs and 4-point relay outputs, with a screw terminal block for I/O wiring. The 16-in/8-out mixed I/O module has 16-point DC sink/source inputs and 8-point relay outputs, with a wire-clamp terminal block for I/O wiring.
Page 60 2: M ODULE PECIFICATIONS Mixed I/O Module Speciﬁcations Type No. FC4A-M08BR1 FC4A-M24BR2 4 inputs in 1 common line 16 inputs in 1 common line I/O Points 4 outputs in 1 common line 8 outputs in 2 common lines Terminal Arrangement See Mixed I/O Module Terminal Arrangement on pages 2-41 and 2-42.
Page 61 2: M ODULE PECIFICATIONS Relay Output Speciﬁcations (Mixed I/O Module) Type No. FC4A-M08BR1 FC4A-M24BR2 Output Points and Common Lines 4 NO contacts in 1 common line 8 NO contacts in 2 common lines 2A per point Maximum Load Current 7A per common line Minimum Switching Load 0.1 mA/0.1V DC (reference value) Initial Contact Resistance...
Page 62 2: M ODULE PECIFICATIONS FC4A-M24BR2 (Mixed I/O Module) — Wire-clamp Terminal Type Source Input Wiring Sink Input Wiring Terminal No. Input Terminal No. Input 2-wire Sensor 2-wire Sensor – + – – 24V DC 24V DC – COM0 COM0 Relay Output Wiring Terminal No.
Page 63: Analog I/O Modules
2: M ODULE PECIFICATIONS Analog I/O Modules Analog I/O modules are available in 3-I/O types, 2-, 4-, and 8-input types, and 1- and 2-output types. The input channel can accept voltage and current signals, thermocouple and resistance thermometer signals, or thermistor signals. The output channel generates voltage and current signals.
Page 64 2: M ODULE PECIFICATIONS Parts Description (1) Expansion Connector (2) Module Label (3) Power LED (PWR) (3) Status LED (STAT) (4) Terminal No. (5) Cable Terminal The terminal style depends on the model of analog I/O modules. (1) Expansion Connector Connects to the CPU and other I/O modules.
Page 65 2: M ODULE PECIFICATIONS Analog I/O Module Speciﬁcations General Speciﬁcations (END Refresh Type) Type No. FC4A-L03A1 FC4A-L03AP1 FC4A-J2A1 FC4A-K1A1 Rated Power Voltage 24V DC Allowable Voltage Range 20.4 to 28.8V DC Terminal Arrangement See Analog I/O Module Terminal Arrangement on pages 2-51 to 2-54. Connector on Mother Board MC1.5/11-G-3.81BK (Phoenix Contact) Connector Insertion/Removal Durability...
Page 66 2: M ODULE PECIFICATIONS Analog Input Speciﬁcations (END Refresh Type) Type No. FC4A-L03A1 / FC4A-J2A1 FC4A-L03AP1 Resistance Analog Input Signal Type Voltage Input Current Input Thermocouple Thermometer Type K (0 to 1300°C) Pt 100 Type J Input Range 0 to 10V DC 4 to 20 mA DC 3-wire type (0 to 1200°C)
Page 67 2: M ODULE PECIFICATIONS Analog Input Speciﬁcations (Ladder Refresh Type) Type No. FC4A-J4CN1 / FC4A-J8C1 FC4A-J4CN1 Resistance Analog Input Signal Type Voltage Input Current Input Thermocouple Thermometer Pt100, Pt1000: Type K: 3-wire type 0 to 1300°C (–100 to 500°C) Type J: Input Range 0 to 10V DC 4 to 20 mA DC...
Page 68 2: M ODULE PECIFICATIONS Type No. FC4A-J4CN1 / FC4A-J8C1 FC4A-J4CN1 Resistance Analog Input Signal Type Voltage Input Current Input Thermocouple Thermometer Pt100: Approx. 6400 increments Approx. (13 bits) 24000 increments Pt1000: Approx. (15 bits) 64000 increments Approx. (16 bits) Digital Resolution 50000 increments (16 bits) 33000 increments Ni100:...
Page 69 2: M ODULE PECIFICATIONS Analog Input Speciﬁcations (Ladder Refresh Type) Type No. FC4A-J8AT1 Analog Input Signal Type NTC Thermistor PTC Thermistor Input Range –50 to 150°C Applicable Thermistor 100 kΩ maximum Input Detection Current 0.1 mA Sample Duration Time 2 ms maximum Sample Repetition Time 2 ms maximum Total Input System...
Page 70 2: M ODULE PECIFICATIONS Analog Output Speciﬁcations Category END Refresh Type Ladder Refresh Type No. FC4A-L03A1 FC4A-L03AP1 FC4A-K1A1 FC4A-K2C1 Voltage 0 to 10V DC –10 to +10V DC Output Range Current 4 to 20 mA DC Load Impedance 2 kΩ minimum (voltage), 300Ω maximum (current) Load Applicable Load Type Resistive load...
Page 71 2: M ODULE PECIFICATIONS Analog I/O Module Terminal Arrangement and Wiring Diagrams FC4A-L03A1 (Analog I/O Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT11P (supplied with the analog I/O module) Terminal No. Channel Fuse 24V DC – – 24V DC Analog voltage/current –...
Page 72 2: M ODULE PECIFICATIONS FC4A-J2A1 (Analog Input Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT11P (supplied with the analog input module) Terminal No. Channel Fuse 24V DC – – 24V DC — Analog voltage/current – output device – Analog voltage/current –...
Page 73 2: M ODULE PECIFICATIONS FC4A-J8C1 (Analog Input Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT10P (supplied with the analog input module) Terminal No. Channel Fuse 24V DC – 24V DC — Analog voltage – output device – – – –...
Page 74 2: M ODULE PECIFICATIONS FC4A-K1A1 (Analog Output Module) — Screw Terminal Type Applicable Terminal Block: FC4A-PMT11P (supplied with the analog output module) Terminal No. Channel Fuse 24V DC – – 24V DC Analog voltage/current – input device – — — •...
Page 75 2: M ODULE PECIFICATIONS Type of Protection Input Circuits FC4A-L03A1, FC4A-L03AP1, FC4A-J2A1 FC4A-J4CN1 Current Source 15 MΩ 1 kΩ NC (A) 1 kΩ + (B’) Input Data 10Ω 1 kΩ – (B) 7Ω – Input Selection Signal I– –V1 FC4A-J8C1 FC4A-J8AT1 Current Source...
Page 76 2: M ODULE PECIFICATIONS Power Supply for Analog I/O Modules When supplying power to the analog I/O modules, take the following considerations. • Power Supply for FC4A-L03A1, FC4A-L03AP1, FC4A-J2A1, and FC4A-K1A1 Use separate power supplies for the CPU module and MicroSmart FC4A-L03A1, FC4A-L03AP1, FC4A-J2A1, and FC4A- .
Page 77: As-Interface Master Module
2: M ODULE PECIFICATIONS AS-Interface Master Module The AS-Interface master module can be used with FC4A-D20RK1, FC4A-D20RS1, FC4A-D40K3, and FC4A-D40S3 CPU modules to communicate digital data with slaves, such as sensor, actuator, and remote I/O data. One AS-Interface master module can be used with one CPU module. The AS-Interface master module can connect a max- imum of 62 digital I/O slaves.
Page 78 2: M ODULE PECIFICATIONS General Speciﬁcations (AS-Interface Module) Operating Temperature 0 to 55°C (operating ambient temperature, no freezing) Storage Temperature –25 to +70°C (no freezing) Relative Humidity Level RH1, 30 to 95% (non-condensing) Pollution Degree 2 (IEC 60664) Degree of Protection IP20 Corrosion Immunity Free from corrosive gases...
Page 79: Hmi Module
2: M ODULE PECIFICATIONS HMI Module The optional HMI module can mount on any all-in-one type CPU module, and also on the HMI base module mounted next to any slim type CPU module. The HMI module makes it possible to manipulate the RAM data in the CPU module with- out using the Online menu options in .
Page 80: Hmi Base Module
2: M ODULE PECIFICATIONS HMI Base Module The HMI base module is used to install the HMI module when using the slim type CPU module. The HMI base module also has a port 2 connector to attach an optional RS232C or RS485 communication adapter. When using the all-in-one type CPU module, the HMI base module is not needed to install the HMI module.
Page 81: Communication Adapters And Communication Modules
2: M ODULE PECIFICATIONS Communication Adapters and Communication Modules CPU modules have communication port 1 for RS232C communication. In addition, all-in-one 16- and 24- MicroSmart I/O type CPU modules have a port 2 connector. An optional communication adapter can be installed on the port 2 connec- tor for RS232C or RS485 communication.
Page 82 2: M ODULE PECIFICATIONS Communication Adapter and Communication Module Speciﬁcations FC4A-PC1 FC4A-PC2 FC4A-PC3 Type No. FC4A-HPC1 FC4A-HPC2 FC4A-HPC3 Standards EIA RS232C EIA RS485 EIA RS485 Computer link: 19,200 bps Maximum Baud Rate 19,200 bps 19,200 bps User com.: 19,200 bps Data link: 38,400 bps Maintenance Communication...
Page 83 2: M ODULE PECIFICATIONS After installing the communication adapter on an all-in-one type CPU module, view the communication adapter through the dummy cartridge opening, and check to see that the PC board of the communication adapter is in a lower level than the top of the terminal block.
Page 84: Memory Cartridge
2: M ODULE PECIFICATIONS Memory Cartridge A user program can be stored on an optional memory cartridge installed on a CPU module from a computer MicroSmart running and the memory cartridge can be installed on another CPU module of the same type. Using WindLDR, MicroSmart a memory cartridge, the CPU module can exchange user programs without using a computer.
Page 85 2: M ODULE PECIFICATIONS Downloading and Uploading User Program to and from Memory Cartridge When a memory cartridge is installed on the CPU module, a user program is downloaded to and uploaded from the mem- ory cartridge using on a computer. When a memory cartridge is not installed on the CPU module, a user program WindLDR is downloaded to and uploaded from the CPU module.
Page 86 2: M ODULE PECIFICATIONS Installing and Removing the Memory Cartridge • Before installing or removing the memory cartridge, turn off the power to the MicroSmart Caution module. Otherwise, the memory cartridge or CPU module may be damaged, or the MicroSmart may not operate correctly.
Page 87: Clock Cartridge
2: M ODULE PECIFICATIONS Clock Cartridge With the optional clock cartridge installed on any type of CPU modules, the can be used for MicroSmart MicroSmart time-scheduled control such as illumination and air conditioners. For setting the calendar/clock, see page 15-5. Clock Cartridge Type Number Module Name Type No.
Page 88: Dimensions
2: M ODULE PECIFICATIONS Dimensions modules have the same proﬁle for consistent mounting on a DIN rail. MicroSmart CPU Modules FC4A-C10R2, FC4A-C10R2C, FC4A-C16R2, FC4A-C16R2C 80.0 70.0 *8.5 mm when the clamp is pulled out. FC4A-C24R2, FC4A-C24R2C 95.0 70.0 *8.5 mm when the clamp is pulled out.
Page 89 2: M ODULE PECIFICATIONS FC4A-D20K3, FC4A-D20S3 35.4 11.3 70.0 *8.5 mm when the clamp is pulled out. FC4A-D20RK1, FC4A-D20RS1 47.5 14.6 70.0 *8.5 mm when the clamp is pulled out. FC4A-D40K3, FC4A-D40S3 47.5 11.3 70.0 *8.5 mm when the clamp is pulled out. All dimensions in mm.
Page 90 2: M ODULE PECIFICATIONS I/O Modules FC4A-N08B1, FC4A-N08A11, FC4A-R081, FC4A-T08K1, FC4A-T08S1, FC4A-M08BR1, FC4A-L03A1, FC4A-L03AP1, FC4A-J2A1, FC4A-K1A1 23.5 14.6 70.0 *8.5 mm when the clamp is pulled out. FC4A-N16B1, FC4A-R161 23.5 14.6 70.0 *8.5 mm when the clamp is pulled out. FC4A-M24BR2 39.1 70.0...
Page 91 2: M ODULE PECIFICATIONS FC4A-N16B3, FC4A-T16K3, FC4A-T16S3 17.6 11.3 70.0 *8.5 mm when the clamp is pulled out. FC4A-N32B3, FC4A-T32K3, FC4A-T32S3 29.7 11.3 70.0 *8.5 mm when the clamp is pulled out. « FC4A M ’ » 2-71 ICRO MART ANUAL...
Page 92 2: M ODULE PECIFICATIONS AS-Interface Module FC4A-AS62M 23.5 70.0 *8.5 mm when the clamp is pulled out. HMI Module FC4A-PH1 35.0 HMI Base Module FC4A-HPH1 38.0 13.9 71.0 *8.5 mm when the clamp is pulled out. All dimensions in mm. 2-72 «...
Page 93 2: M ODULE PECIFICATIONS Communication Modules FC4A-HPC1, FC4A-HPC2, FC4A-HPC3 22.5 13.9 70.0 *8.5 mm when the clamp is pulled out. Example: The following ﬁgure illustrates a system setup consisting of the all-in-one 24-I/O type CPU module, an 8-point relay output module, and a 16-point DC input module mounted on a 35-mm-wide DIN rail using BNL6P mounting clips. 95.0 23.5 23.5...
Page 94 2: M ODULE PECIFICATIONS 2-74 « FC4A M ’ » ICRO MART ANUAL...
Page 95: Nstallation And
3: I NSTALLATION AND IRING Introduction This chapter describes the methods and precautions for installing and wiring modules. MicroSmart Before starting installation and wiring, be sure to read “Safety Precautions” in the beginning of this manual and under- stand precautions described under Warning and Caution. •...
Page 96: Assembling Modules
3: I NSTALLATION AND IRING Assembling Modules • Assemble modules together before mounting the modules onto a DIN rail. Attempt MicroSmart Caution to assemble modules on a DIN rail may cause damage to the modules. • Turn off the power to the MicroSmart before assembling the modules.
Page 97: Installing The Hmi Module
3: I NSTALLATION AND IRING Installing the HMI Module • Turn off the power to the before installing or removing the HMI module to prevent MicroSmart Caution electrical shocks. • Do not touch the connector pins with hand, otherwise electrostatic discharge may damage the internal elements.
Page 98: Removing The Hmi Module
3: I NSTALLATION AND IRING Removing the HMI Module • Turn off the power to the before installing or removing the HMI module to prevent MicroSmart Caution electrical shocks. • Do not touch the connector pins with hand, otherwise electrostatic discharge may damage the internal elements.
Page 99: Removing The Terminal Blocks
3: I NSTALLATION AND IRING Removing the Terminal Blocks • Turn off the power to the before installing or removing the terminal blocks to pre- MicroSmart Caution vent electrical shocks. • Use the correct procedures to remove the terminal blocks, otherwise the terminal blocks may be damaged.
Page 100: Removing The Communication Connector Cover
3: I NSTALLATION AND IRING Removing the Communication Connector Cover • When using a thin screwdriver to pull out the communication connector cover, insert the screw- Caution driver carefully and do not damage the electronic parts inside the CPU module. •...
Page 101: Mounting On Din Rail
• Mount the MicroSmart modules on a 35-mm-wide DIN rail or a panel surface. Applicable DIN rail: IDEC’s BAA1000PN10 or BAP1000PN10 (1000mm/39.4” long) 1. Fasten the DIN rail to a panel using screws ﬁrmly. 2. Pull out the clamp from each...
Page 102 Mounting Hole Layout for Direct Mounting on Panel Surface Make mounting holes of ø4.3 mm as shown below and use M4 screws (6 or 8 mm long) to mount the modules MicroSmart on the panel surface. • CPU Modules FC4A-C10R2, FC4A-C10R2C, FC4A-C24R2, FC4A-C24R2C FC4A-C16R2, FC4A-C16R2C 68.0 83.0 80.0 95.0...
Page 103 3: I NSTALLATION AND IRING • I/O Modules FC4A-N08B1, FC4A-N16B1, FC4A-N08A11, FC4A-R081, FC4A-N16B3, FC4A-T16K3, FC4A-T16S3 FC4A-R161, FC4A-T08K1, FC4A-T08S1, FC4A-M08BR1, FC4A-L03A1, FC4A-L03AP1, FC4A-J2A1, FC4A-K1A1 23.5 17.6 FC4A-N32B3, FC4A-T32K3, FC4A-T32S3 FC4A-M24BR2 29.7 39.1 • AS-Interface Module • HMI Base Module • Communication Modules FC4A-AS62M FC4A-HPH1 FC4A-HPC1, FC4A-HPC2, FC4A-HPC3...
Page 104 3: I NSTALLATION AND IRING Example 1: Mounting hole layout for FC4A-C24R2 and 23.5-mm-wide I/O modules 12.3 23.5 23.5 23.5 83.0 15.3 23.5 23.5 23.5 Direct Mounting Strip FC4A-PSP1P Example 2: Mounting hole layout for, from left, FC4A-HPH1, FC4A-D20K3, FC4A-N16B3, FC4A-N32B3, and FC4A-M24R2 modules 41.8 17.6 17.6...
Page 105: Installation In Control Panel
3: I NSTALLATION AND IRING Installation in Control Panel modules are designed for installation in a cabinet. Do not install the modules outside a cabi- MicroSmart MicroSmart net. The environment for using the is “Pollution degree 2.” Use the in environments of pollution MicroSmart MicroSmart degree 2 (according to IEC 60664-1).
Page 106: Mounting Direction
3: I NSTALLATION AND IRING Mounting Direction Mount the modules horizontally on a vertical plane as shown on the preceding page. Keep a sufﬁcient spacing MicroSmart around the modules to ensure proper ventilation and keep the ambient temperature between 0°C and 55°C. MicroSmart All-in-One Type CPU Module When the ambient temperature is 35°C or below, the all-in-one type CPU modules can also be mounted upright on a hori-...
Page 107: Input Wiring
3: I NSTALLATION AND IRING Input Wiring • Separate the input wiring from the output line, power line, and motor line. Caution • Use proper wires for input wiring. All-in-one type CPU modules: UL1015 AWG22 or UL1007 AWG18 Slim type CPU and I/O modules: UL1015 AWG22 DC Source Input DC Sink Input DC.IN...
Page 108: Output Wiring
3: I NSTALLATION AND IRING Output Wiring • If output relays or transistors in the CPU or output modules should fail, outputs may MicroSmart Caution remain on or off. For output signals which may cause heavy accidents, provide a monitor circuit outside the MicroSmart •...
Page 109 3: I NSTALLATION AND IRING Contact Protection Circuit for Relay and Transistor Outputs Depending on the load, a protection circuit may be needed for the relay output of the MicroSmart modules. Choose a pro- tection circuit from A through D shown below according to the power supply and connect the protection circuit to the out- side of the CPU or relay output module.
Page 110: Power Supply
3: I NSTALLATION AND IRING Power Supply All-in-One Type CPU Module (AC and DC Power) • Use a power supply of the rated value. Use of a wrong power supply may cause ﬁre hazard. Caution • The allowable power voltage range is 85 to 264V AC for the AC power type CPU module and 16.0 to 31.2V DC for the DC power type CPU module.
Page 111 3: I NSTALLATION AND IRING Slim Type CPU Module (DC Power) • Use a power supply of the rated value. Use of a wrong power supply may cause ﬁre hazard. Caution • The allowable power voltage range for the slim type CPU module is 20.4 to 26.4V MicroSmart DC.
Page 112: Terminal Connection
3: I NSTALLATION AND IRING Terminal Connection • Make sure that the operating conditions and environments are within the speciﬁcation values. Caution • Be sure to connect the grounding wire to a proper ground, otherwise electrical shocks may be caused. •...
Page 113: Operation Basics
4: O PERATION ASICS Introduction This chapter describes general information about setting up the basic system for programming, starting and MicroSmart stopping operation, and introduces simple operating procedures from creating a user program using MicroSmart WindLDR on a computer to monitoring the operation.
Page 114 4: O PERATION ASICS Computer Link through Port 2 (RS485) When connecting a Windows computer to port 2 on the all-in-one 16- or 24-I/O type CPU module or slim type CPU mod- ule, enable the maintenance protocol for port 2 using the Function Area Settings in .
Page 115: Start/Stop Operation
4: O PERATION ASICS Start/Stop Operation This section describes operations to start and stop the and to use the stop and reset inputs. MicroSmart • Make sure of safety before starting and stopping the . Incorrect operation on the MicroSmart Caution may cause machine damage or accidents.
Page 116 4: O PERATION ASICS Start/Stop Operation Using the Power Supply MicroSmart can be started and stopped by turning power on and off. 1. Power up the MicroSmart to start operation. See page 4-1. 2. If the does not start, check that start control special internal relay M8000 is on using .
Page 117: Simple Operation
4: O PERATION ASICS Simple Operation This section describes how to edit a simple program using on a computer, transfer the program from the com- WindLDR puter to the , run the program, and monitor the operation on the screen. MicroSmart WindLDR Connect the...
Page 118 4: O PERATION ASICS Uncheck the Use Tag check box. Edit User Program Rung by Rung Start the user program with the LOD instruction by inserting a NO contact of input I0. 1. Click the Normally Open contact icon 2. Move the mouse pointer to the ﬁrst column of the ﬁrst line where you want to insert a NO contact, and click the left mouse button.
Page 119 4: O PERATION ASICS 6. Enter I1 in the Allocation Number ﬁeld, and click OK. A NC contact of input I1 is programmed in the second column of the ﬁrst ladder line. At the end of the ﬁrst ladder line, program the OUT instruction by inserting a NO coil of output Q0. 7.
Page 120 4: O PERATION ASICS Download Program You can download the user program from WindLDR running on a computer to the MicroSmart From the menu bar, select Online > Download Program. The Download Program Dialog appears, then click WindLDR the Download button. The user program is downloaded to the MicroSmart Download Button Note: When downloading a user program, all values and selections in the Function Area Settings are also downloaded to the...
Page 121: Function Area Settings
5: S PECIAL UNCTIONS Introduction features special functions such as stop/reset inputs, run/stop selection at memory backup error, keep des- MicroSmart ignation for internal relays, shift registers, counters, and data registers. These functions are programmed using the Func- tion Area Settings menu. Also included in the Function Area Settings are high-speed counter, catch input, interrupt input, communication protocol selection for port 1 and port 2, input ﬁlter, and user program read/write protection.
Page 122: Stop Input And Reset Input
5: S PECIAL UNCTIONS Stop Input and Reset Input As described on page 4-3, the can be started and stopped using a stop input or reset input, which can be desig- MicroSmart nated from the Function Area Settings menu. When the designated stop or reset input is turned on, the stops MicroSmart operation.
Page 123: Run/Stop Selection At Memory Backup Error
5: S PECIAL UNCTIONS Run/Stop Selection at Memory Backup Error Start control special internal relay M8000 maintains its status when the CPU is powered down. After the CPU has been off for a period longer than the battery backup duration, the data designated to be maintained during power failure is broken. The Run/Stop Selection at Memory Backup Error dialog box is used to select whether to start or stop the CPU when attempting to restart operation after the “keep”...
Page 124: Keep Designation For Internal Relays, Shift Registers, Counters, And Data Registers
5: S PECIAL UNCTIONS Keep Designation for Internal Relays, Shift Registers, Counters, and Data Registers The statuses of internal relays and shift register bits are usually cleared at startup. It is also possible to designate all or a block of consecutive internal relays or shift register bits as “keep” types. Counter current values and data register values are usually maintained at powerup.
Page 125 ﬁeld and the end “keep” number in the right ﬁeld. The start “keep” num- ber must be smaller than or equal to the end “keep” number. Valid shift register bit numbers are R0 through R63 (FC4A-C10R2 and FC4A-C10R2C CPU modules) or R0 through R127 (other CPU modules).
Page 126: High-Speed Counter
5: S PECIAL UNCTIONS High-speed Counter This section describes the high-speed counter function to count many pulse inputs within one scan. Using the built-in 16- bit high-speed counter, the counts up to 65535 high-speed pulses from a rotary encoder or proximity switch MicroSmart without regard to the scan time, compares the current value with a preset value, and turns on the output when the current value reaches the preset value.
Page 127 5: S PECIAL UNCTIONS Special Data Registers for Two-phase High-speed Counter (All-in-One Type CPU Modules) High-speed Counter No. Description Updated Read/Write HSC1 HSC2 HSC3 HSC4 High-speed Counter Current Value D8045 — — — Every scan Read only High-speed Counter Reset Value D8046 —...
Page 128 5: S PECIAL UNCTIONS Special Data Registers for Single-phase High-speed Counters (All-in-One Type CPU Modules) High-speed Counter No. Description Updated Read/Write HSC1 HSC2 HSC3 HSC4 High-speed Counter Current Value D8045 D8047 D8049 D8051 Every scan Read only High-speed Counter Preset Value D8046 D8048 D8050...
Page 129 5: S PECIAL UNCTIONS Special Internal Relays for Two-phase High-speed Counter (Slim Type CPU Modules) High-speed Counter No. Description Read/Write HSC1 HSC2 HSC3 HSC4 Comparison Output Reset M8030 — — M8044 Turns off comparison output Gate Input M8031 — — M8045 Enables counting Reset Input...
Page 130 5: S PECIAL UNCTIONS Special Internal Relays for Single-phase High-speed Counters (Slim Type CPU Modules) High-speed Counter No. Description Read/Write HSC1 HSC2 HSC3 HSC4 Comparison Output Reset M8030 M8034 M8040 M8044 Turns off comparison output Gate Input M8031 M8035 M8041 M8045 Enables counting Reset Input...
Page 131 5: S PECIAL UNCTIONS Programming WindLDR (All-in-One Type CPU Modules) 1. From the menu bar, select Conﬁgure > Function Area Settings. The Function Area Settings dialog box WindLDR appears. 2. Select the Special Input tab. 3. When using high-speed counter HSC1, select Two/Single-phase High-speed Counter in the Group 1 pull-down list box.
Page 132 5: S PECIAL UNCTIONS Programming WindLDR (Slim Type CPU Modules) 1. From the menu bar, select Conﬁgure > Function Area Settings. The Function Area Settings dialog box WindLDR appears. 2. Select the Special Input tab. 3. When using high-speed counter HSC1 or HSC4, select Two/Single- phase High-speed Counter in the Group 1 or 4 pull-down list box.
Page 133 5: S PECIAL UNCTIONS Two-phase High-speed Counter Timing Chart Example: Reset input I2 is used. Q1 is designated as a comparison output. The D8046 value at this point becomes the reset value for the next counting cycle. 65535 65534 65533 65532 Current Value D8045 Phase A Input I0...
Page 134 5: S PECIAL UNCTIONS Single-phase High-speed Counter Timing Chart Example: Single--phase high-speed counter HSC2 Preset value is 8. Q0 is designated as a comparison output. The D8048 value at this point becomes the preset value for the next counting cycle. Current Value D8047 Pulse Input I3 Reset Input M8036...
Page 135 5: S PECIAL UNCTIONS Example: Two-phase High-speed Counter for Counting Input Pulses from Rotary Encoder This example demonstrates a program for two-phase high-speed counter HSC1 to punch holes in a paper tape at regular intervals. Description of Operation A rotary encoder is linked to the tape feed roller directly, and Rolled Tape the output pulses from the rotary encoder are counted by the two-phase high-speed counter in the...
Page 136 5: S PECIAL UNCTIONS Ladder Diagram When the starts operation, reset value 62836 is stored to reset value special internal relay D8046. Gate input MicroSmart special internal relay M8031 is turned on at the end of the third scan to start the high-speed counter to count input pulses. M8120 is the initialize pulse special internal relay.
Page 137 5: S PECIAL UNCTIONS Example: Single-phase High-speed Counter This example demonstrates a program for single-phase high-speed counter HSC2 to count input pulses and turn on output Q2 every 1000 pulses. Program Parameters Group 2 (I3) Single-phase High-speed Counter Enable Comparison Comparison Output HSC Preset Value (D8048) 1000...
Page 138: Catch Input
5: S PECIAL UNCTIONS Catch Input The catch input function is used to receive short pulses from sensor outputs regardless of the scan time. Input pulses shorter than one scan time can be received. Four inputs I2 through I5 can be designated to catch a rising or falling edge of short input pulses, and the catch input statuses are stored to special internal relays M8154 through M8157, respectively.
Page 139 5: S PECIAL UNCTIONS Catching Rising Edge of Input Pulse Note Actual Input (I2 to I5) Catch Input Relay (M8154-M8157) 1 scan time Processed Catching Falling Edge of Input Pulse Note Actual Input (I2 to I5) Catch Input Relay (M8154-M8157) 1 scan time Processed Note: When two or more pulses enter within one scan, subsequent pulses are ignored.
Page 140: Interrupt Input
5: S PECIAL UNCTIONS Interrupt Input CPU modules have an interrupt input function. When a quick response to an external input is required, MicroSmart such as positioning control, the interrupt input can call a subroutine to execute an interrupt program. Four inputs I2 through I5 can be designated to execute interrupt at a rising and/or falling edge of input pulses.
Page 141 5: S PECIAL UNCTIONS Example: Interrupt Input The following example demonstrates a program of using the interrupt input function, with input I2 designated as an inter- rupt input. When the interrupt input is turned on, the input I0 status is immediately transferred to output Q0 using the IOREF (I/O refresh) instruction before the END instruction is executed.
Page 142: Timer Interrupt
5: S PECIAL UNCTIONS Timer Interrupt In addition to the interrupt input as described in the preceding section, slim type CPU modules FC4A-D20RK1, FC4A- D20RS1, FC4A-D40K1, and FC4A-D40S1 have a timer interrupt function. When a repetitive operation is required, the timer interrupt can be used to call a subroutine repeatedly at predetermined intervals of 10 through 140 ms.
Page 143 5: S PECIAL UNCTIONS Example: Timer Interrupt The following example demonstrates a program of using the timer interrupt function. The Function Area Settings must also be completed to use the timer interrupt function as described on the preceding page. M8120 is the initialize pulse special internal relay. MOV(W) S1 –...
Page 144: Input Filter
5: S PECIAL UNCTIONS Input Filter The input ﬁlter function is used to reject input noises. The catch input function described in the preceding section is used to read short input pulses to special internal relays. On the contrary, the input ﬁlter rejects short input pulses when the is used with input signals containing noises.
Page 145: User Program Protection
5: S PECIAL UNCTIONS User Program Protection The user program in the CPU module can be protected from reading, writing, or both using the Function Area MicroSmart Settings in . The read/write protection can be temporarily disabled using a predetermined password. WindLDR Upgraded CPU modules with system program version 210 or higher have an option for read protection without a pass- word, making it possible to inhibit reading completely.
Page 146 5: S PECIAL UNCTIONS 4. When a password protect mode is selected, the Password Setting dialog box appears. Enter a password of 1 through 8 ASCII characters from the key board in the Password ﬁeld, and enter the same password in the Conﬁrm Password ﬁeld. Click the OK button to return to the Others tab page.
Page 147: Constant Scan Time
5: S PECIAL UNCTIONS Constant Scan Time The scan time may vary whether basic and advanced instructions are executed or not depending on input conditions to these instructions. The scan time can be made constant by entering a required scan time preset value into special data reg- ister D8022 reserved for constant scan time.
Page 148: Partial Program Download
5: S PECIAL UNCTIONS Partial Program Download Normally, the CPU module has to be stopped before downloading a user program. The all-in-one 16- and 24-I/O type CPU modules and all slim type CPU modules have run-time program download capabilities to download a user program con- taining small changes while the CPU is running in either 1:1 or 1:N computer link system.
Page 149 5: S PECIAL UNCTIONS Using Partial Program Download The partial program download function can download a maximum of 600 bytes (100 steps) of user program. When the modiﬁed rungs of the user program exceed 600 bytes, the partial program download cannot be used. Make sure that modi- ﬁcation is within 600 bytes.
Page 150: Analog Potentiometers
5: S PECIAL UNCTIONS Analog Potentiometers The all-in-one 10- and 16-I/O type CPU modules and every slim type CPU module have one analog potentiometer. Only the 24-I/O type CPU module has two analog potentiometers. The values (0 through 255) set with analog potentiometers 1 and 2 are stored to data registers D8057 and D8058, respectively, and updated in every scan.
Page 151: Analog Voltage Input
5: S PECIAL UNCTIONS Analog Voltage Input Every slim type CPU module has an analog voltage input connector. When an analog voltage of 0 through 10V DC is applied to the analog voltage input connector, the signal is converted to a digital value of 0 through 255 and stored to spe- cial data register D8058.
Page 152: Hmi Module
5: S PECIAL UNCTIONS HMI Module This section describes the functions and operation of the optional HMI module (FC4A-PH1). The HMI module can be installed on any all-in-one type CPU module, and also on the HMI base module mounted next to any slim type CPU mod- ule.
Page 153 5: S PECIAL UNCTIONS Key Operation for Scrolling Menus after Power-up The chart below shows the sequence of scrolling menus using the ▼ and ▲ buttons on the HMI module after power-up. While a menu screen is shown, press the OK button to enter into each control screen where operand numbers and values are selected.
Page 154 Special data register D8068 is available on upgraded CPU modules with system program version shown in the table below. For the procedure to conﬁrm the system program version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C...
Page 155 5: S PECIAL UNCTIONS Displaying Timer/Counter Current Values and Changing Timer/Counter Preset Values This section describes the procedure for displaying a timer current value and for changing the timer preset value for an example. The same procedure applies to counter current values and preset values. Example: Change timer T28 preset value 820 to 900 1.
Page 156 5: S PECIAL UNCTIONS Example: When timer T28 preset value is designated using a data register 1. Select the Timer menu. Go to control screen. 2. Select the operand number. ▼▼ ▲ Select digit. Decrement Back to digit Shift up one the value.
Page 157 5: S PECIAL UNCTIONS Displaying and Changing Data Register Values This section describes the procedure for displaying and changing the data register value. Example: Change data register D180 value to 1300 1. Select the Data Register menu. Go to control screen.
Page 158 5: S PECIAL UNCTIONS Setting and Resetting Bit Operand Status Bit operand statuses, such as inputs, outputs, internal relays, and shift register bits, can be displayed, and set or reset using the MHI module. This section describes the procedure for displaying an internal relay status and for setting the internal relay for an example. The same procedure applies to inputs, outputs, and shift register bits.
Page 159 5: S PECIAL UNCTIONS Displaying and Clearing Error Data This section describes the procedure for displaying general error codes and for clearing the general error codes. 1. Select the Error menu. Go to control screen. 2. General error codes are displayed. Clear the general error codes. To abort clearing the general error codes, press the ESC button Clear the general error codes.
Page 160 5: S PECIAL UNCTIONS Displaying and Changing Calendar Data (only when using the clock cartridge) When an optional clock cartridge (FC4A-PT1) is installed in the MicroSmart CPU module, the calendar data of the clock cartridge can be displayed and changed using the HMI module as described in this section. Example: Change calendar data from Saturday, 01/01/2000 to Wednesday, 04/04/2001 1.
Page 161 5: S PECIAL UNCTIONS Displaying and Changing Clock Data (only when using the clock cartridge) When an optional clock cartridge (FC4A-PT1) is installed in the MicroSmart CPU module, the clock data of the clock car- tridge can be displayed and changed using the HMI module as described in this section. Example: Change clock data from 12:05 to 10:10 1.
Page 162: Expansion Data Registers
5: S PECIAL UNCTIONS Expansion Data Registers Slim type CPU modules FC4A-D20RK1, FC4A-D20RS1, FC4A-D40K3, and FC4A-D40S3 have expansion data registers D2000 through D7999. These expansion data registers are normally used as ordinary data registers to store numerical data while the CPU module is executing a user program. In addition, numerical data can be set to designated ranges of expan- sion data registers using the expansion data register editor on WindLDR .
Page 163 5: S PECIAL UNCTIONS 3. Click the Edit button. The Edit Expansion Data Registers screen appears. First Data Register No. The speciﬁed quantity of data registers are reserved to store preset values in the Edit Expansion Data Registers screen. You can enter numerical values to these data registers individually, in the form of character strings, or ﬁll the same value to consecutive data registers.
Page 164 5: S PECIAL UNCTIONS Data Movement of Preset Data Registers Like preset values for timers and counters (page 7-13), the preset data of expansion data registers can be changed in the RAM, the changed data can be cleared, and also stored to the EEPROM. The data movement is described below. At Power-up and User Program Download When the user program is downloaded to the CPU WindLDR...
Page 165: Operand Allocation Numbers
24-I/O type CPU module among all-in-one type CPU modules. All slim type CPU modules can be used with I/O modules to expand the I/O points. For details of I/O, internal relay, and special internal relay num- bers, see page 6-3. All-in-One Type CPU Modules FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-C10R2C...
Page 166 6: A LLOCATION UMBERS Slim Type CPU Modules FC4A-D20K3 FC4A-D20RK1 FC4A-D40K3 FC4A-D20S3 FC4A-D20RS1 FC4A-D40S3 Operand Allocation No. Points Allocation No. Points Allocation No. Points I0 - I7 I0 - I7 I0 - I7 Input (I) I10 - I17 I10 - I13 I10 - I13 I20 - I27 Expansion Input (I)
Page 167: I/O, Internal Relay, And Special Internal Relay Operand Allocation Numbers
6: A LLOCATION UMBERS I/O, Internal Relay, and Special Internal Relay Operand Allocation Numbers Operand Allocation Numbers CPU Module I0-I5 FC4A-C10R2/C I0-I7 FC4A-C16R2/C I0-I7 I10-I15 I30-I37 I40-I47 I50-I57 I60-I67 FC4A-C24R2/C I70-I77 I80-I87 I90-I97 I100-I107 I0-I7 I10-I13 I30-I37 I40-I47 I50-I57 I60-I67...
Page 168 M680-M687 M690-M697 M700-M707 M710-M717 M720-M727 M730-M737 M740-M747 M750-M757 M760-M767 M770-M777 M780-M787 M790-M797 All types except M800-M807 M810-M817 M820-M827 M830-M837 FC4A-C10R2/C M840-M847 M850-M857 M860-M867 M870-M877 M880-M887 M890-M897 M900-M907 M910-M917 M920-M927 M930-M937 M940-M947 M950-M957 M960-M967 M970-M977 M980-M987 M990-M997 M1000-M1007 M1010-M1017 M1020-M1027 M1030-M1037...
Page 169: Operand Allocation Numbers For End Refresh Type Analog I/O Modules
6: A LLOCATION UMBERS Operand Allocation Numbers for END Refresh Type Analog I/O Modules Analog I/O Module Number Analog Input Channel 0 Analog Input Channel 1 Analog Output Reserved D760-D765 D766-D771 D772-D777 D778, D779 D780-D785 D786-D791 D792-D797 D798, D799 D800-D805 D806-D811 D812-D817 D818, D819...
Page 170: Operand Allocation Numbers For Data Link Master Station
6: A LLOCATION UMBERS Operand Allocation Numbers for Data Link Master Station Allocation Number Slave Station Number Transmit Data Receive Data Data Link to Slave Station from Slave Station Communication Error Slave Station 1 D900-D905 D906-D911 D8069 Slave Station 2 D912-D917 D918-D923 D8070...
Page 171: Special Internal Relays
6: A LLOCATION UMBERS Special Internal Relays Special internal relays M8000 through M8077 are read/write internal relays used for controlling the CPU operation and communication. Special internal relays M8080 through M8157 are read-only internal relays primarily used for indicating the CPU statuses. All special internal relays cannot be used as destinations of advanced instructions. Internal relays M300 through M315 are used to read input operand statuses of the IOREF (I/O refresh) instruction.
Page 172 6: A LLOCATION UMBERS Allocation Description CPU Stopped Power OFF Number M8045 High-speed Counter 4 (I5-I7) Gate Input Maintained Cleared M8046 High-speed Counter 4 (I5-I7) Reset Input Maintained Cleared M8047 — Reserved — — — M8050 Modem Mode (Originate): Initialization String Star t Maintained Maintained M8051...
Page 173 6: A LLOCATION UMBERS Allocation Description CPU Stopped Power OFF Number M8100 Data Link Slave Station 17 Communication Completion Relay Operating Cleared M8101 Data Link Slave Station 18 Communication Completion Relay Operating Cleared M8102 Data Link Slave Station 19 Communication Completion Relay Operating Cleared M8103...
Page 174 6: A LLOCATION UMBERS M8000 Start Control M8000 is used to control the operation of the CPU. The CPU stops operation when M8000 is turned off while the CPU is running. M8000 can be turned on or off using the Online menu.
Page 175 6: A LLOCATION UMBERS M8013 Calendar/Clock Data Write/Adjust Error Flag When an error occurs while calendar/clock data is written or clock data is adjusted, M8013 turns on. If calendar/clock data is written or clock data is adjusted successfully, M8013 turns off. M8014 Calendar/Clock Data Read Error Flag When an error occurs while calendar/clock data is read, M8014 turns on.
Page 176 6: A LLOCATION UMBERS M8032, M8036, M8042, M8046 High-speed Counter Reset Input When M8032 or M8046 is turned on while two-phase high-speed counter 1 or 4 is enabled, the current value in D8045 or D8051 is reset to the value stored in D8046 or D8052 (high-speed counter reset value) and the two-phase high-speed counter counts subsequent input pulses starting at the reset value.
Page 177 6: A LLOCATION UMBERS M8132 High-speed Counter 1 (I0-I2) Current Value Underﬂow (ON for 1 scan) When the current value of high-speed counter 1 drops blow 0 while two-phase high-speed counter is enabled, M8132 turns on for one scan. M8133 High-speed Counter 2 (I3) Comparison ON Status (ON for 1 scan) When the current value of high-speed counter 2 reaches the preset value, M8133 turns on for one scan.
Page 178: Special Data Registers
6: A LLOCATION UMBERS Special Data Registers • Do not change the data of reserved special data registers, otherwise the may not operate MicroSmart Caution correctly. Special Data Register Allocation Numbers Allocation Description Updated See Page Number D8000 System Setup ID (Quantity of Inputs) When I/O initialized 6-16 D8001...
Page 179 6: A LLOCATION UMBERS Special Data Registers for High-speed Counters Allocation Description Updated See Page Number D8045 High-speed Counter 1 (I0-I2) Current Value Every scan 5-7, 5-8 High-speed Counter 1 (I0-I2) Reset Value (two-phase) D8046 5-7, 5-8 High-speed Counter 1 (I0-I2) Preset Value (single-phase) D8047 High-speed Counter 2 (I3) Current Value Every scan...
Page 180 6: A LLOCATION UMBERS Allocation Description Updated See Page Number D8085 Slave Station 17 Communication Error (at Master Station) When error occurred 25-4 D8086 Slave Station 18 Communication Error (at Master Station) When error occurred 25-4 D8087 Slave Station 19 Communication Error (at Master Station) When error occurred 25-4 D8088...
Page 181 6: A LLOCATION UMBERS D8002 CPU Module Type Information Information about the CPU module type is stored to D8002. 0: FC4A-C10R2 or FC4A-C10R2C 1: FC4A-C16R2 or FC4A-C16R2C 2: FC4A-D20K3 or FC4A-D20S3 3: FC4A-C24R2 or FC4A-C24R2C 4: FC4A-D40K3 or FC4A-D40S3 6: FC4A-D20RK1 or FC4A-D20RS1...
Page 182: Expansion I/O Module Operands
88 points. Input and output numbers are automatically allocated to each digital I/O module, starting with I30 and Q30, in the order of increasing distance from the CPU module. Expansion I/O modules cannot be mounted with the 10- and 16-I/O type CPU modules (FC4A-C10R2, FC4A-C10R2C, FC4A-C16R2, and FC4A-C16R2C). I/O Allocation Numbers (All-in-One Type CPU Modules)
Page 183 6: A LLOCATION UMBERS I/O Expansion for Slim Type CPU Modules All slim type CPU modules can connect a maximum of seven expansion I/O modules including analog I/O modules. The expandable I/O points and the maximum total I/O points vary with the type of CPU module as listed below. Allocation Numbers (Slim Type CPU Modules) FC4A-D20K3 FC4A-D20RK1...
Page 184 6: A LLOCATION UMBERS 6-20 « FC4A M ’ » ICRO MART ANUAL...
Page 185: Basic Instruction List
7: B ASIC NSTRUCTIONS Introduction This chapter describes programming of the basic instructions, available operands, and sample programs. All basic instructions are available on all CPU modules. MicroSmart Basic Instruction List Qty of Symbol Name Function Bytes Page Series connection of NO contact AND LOD And Load Series connection of circuit blocks...
Page 186: Lod (Load) And Lodn (Load Not)
7: B ASIC NSTRUCTIONS LOD (Load) and LODN (Load Not) The LOD instruction starts the logical operation with a NO (normally open) contact. The LODN instruction starts the log- ical operation with a NC (normally closed) contact. A total of eight LOD and/or LODN instructions can be programmed consecutively. Ladder Diagram Valid Operands Instruction...
Page 187: Set And Rst (Reset)
7: B ASIC NSTRUCTIONS Examples: LOD (Load), OUT (Output), and NOT Ladder Diagram Program List Timing Chart Instruction Data OUTN Ladder Diagram Program List Instruction Data Ladder Diagram Program List Instruction Data LODN Ladder Diagram Program List Instruction Data OUTN Ladder Diagram Program List Instruction...
Page 188: And And Andn (And Not)
7: B ASIC NSTRUCTIONS and ANDN (And Not) The AND instruction is used for programming a NO contact in series. The ANDN instruction is used for programming a NC contact in series. The AND or ANDN instruction is entered after the ﬁrst set of contacts. Ladder Diagram Program List Timing Chart...
Page 189: And Lod (Load)
7: B ASIC NSTRUCTIONS AND LOD (Load) The AND LOD instruction is used to connect, in series, two or more circuits starting with the LOD instruction. The AND LOD instruction is the equivalent of a “node” on a ladder diagram. When using , the user need not program the AND LOD instruction.
Page 190: Bps (Bit Push), Brd (Bit Read), And Bpp (Bit Pop)
7: B ASIC NSTRUCTIONS BPS (Bit Push), BRD (Bit Read), and BPP (Bit Pop) The BPS (bit push) instruction is used to save the result of bit logical operation temporarily. The BRD (bit read) instruction is used to read the result of bit logical operation which was saved temporarily. The BPP (bit pop) instruction is used to restore the result of bit logical operation which was saved temporarily.
Page 191: Tml, Tim, Tmh, And Tms (Timer)
7: B ASIC NSTRUCTIONS TML, TIM, TMH, and TMS (Timer) Four types of timedown timers are available; 1-sec timer TML, 100-ms timer TIM, 10-ms timer TMH, and 1-ms timer TMS. A total of 32 timers (all-in-one 10-I/O type CPU module) or 100 timers (other CPU modules) can be programmed in a user program.
Page 192 7: B ASIC NSTRUCTIONS Timer Circuit The preset value 0 through 65535 can be designated using a data register D0 through D1299 or D2000 through D7999; then the data of the data register becomes the preset value. Directly after the TML, TIM, TMH, or TMS instruction, the OUT, OUTN, SET, RST, TML, TIM, TMH, or TMS instruction can be programmed.
Page 193 7: B ASIC NSTRUCTIONS Timer Accuracy, continued Timer Counting Error Every timer instruction operation is individually based on asynchronous 16-bit reference timers. Therefore, an error occurs depending on the status of the asynchronous 16-bit timer when the timer instruction is executed. Error (1-sec timer) (100-ms timer)
Page 194: Cnt, Cdp, And Cud (Counter)
7: B ASIC NSTRUCTIONS CNT, CDP, and CUD (Counter) Three types of counters are available; adding (up) counter CNT, dual-pulse reversible counter CDP, and up/down selection reversible counter CUD. A total of 32 counters (all-in-one 10-I/O type CPU module) or 100 counters (other CPU modules) can be programmed in a user program.
Page 195 7: B ASIC NSTRUCTIONS CDP (Dual-Pulse Reversible Counter) The dual-pulse reversible counter CDP has up and down pulse inputs, so that three inputs are required. The circuit for a dual-pulse reversible counter must be programmed in the following order: preset input, up-pulse input, down-pulse input, the CDP instruction, and a counter number C0 through C99, followed by a counter preset value from 0 to 65535.
Page 196 7: B ASIC NSTRUCTIONS CUD (Up/Down Selection Reversible Counter) The up/down selection reversible counter CUD has a selection input to switch the up/down gate, so that three inputs are required. The circuit for an up/down selection reversible counter must be programmed in the following order: preset input, pulse input, up/down selection input, the CUD instruction, and a counter number C0 through C99, followed by a counter preset value from 0 to 65535.
Page 197 7: B ASIC NSTRUCTIONS Changing, Conﬁrming, and Clearing Preset Values for Timers and Counters Preset values for timers and counters can be changed using the Point Write command on WindLDR for transferring a new value to the CPU module RAM as described on preceding pages. After changing the preset values tempo- MicroSmart rarily, the changes can be written to the user program in the CPU module EEPROM or cleared from the RAM.
Page 198: Cc= And Cc≥ (Counter Comparison)
7: B ASIC NSTRUCTIONS CC= and CC≥ (Counter Comparison) The CC= instruction is an equivalent comparison instruction for counter current values. This instruction will constantly compare current values to the value that has been programmed in. When the counter value equals the given value, the desired output will be initiated.
Page 199 7: B ASIC NSTRUCTIONS Examples: CC= and CC≥ (Counter Comparison) Ladder Diagram 1 Program List Reset Instruction Data Pulse CC≥ CC>= Timing Chart Reset Input I0 Pulse Input I1 • • • Output Q0 is on when counter C2 current value is 5.
Page 200: Dc= And Dc≥ (Data Register Comparison)
7: B ASIC NSTRUCTIONS DC= and DC≥ (Data Register Comparison) The DC= instruction is an equivalent comparison instruction for data register values. This instruction will constantly com- pare data register values to the value that has been programmed in. When the data register value equals the given value, the desired output will be initiated.
Page 201 7: B ASIC NSTRUCTIONS Examples: DC= and DC≥ (Data Register Comparison) Ladder Diagram 1 Program List Instruction Data MOV(W) S1 – D1 – MOV(W) D10 – – DC>= DC≥ Timing Chart Input I1 D10 Value 10 10 D2 Value Output Q0 is on when data register D2 value is 5.
Page 202: Sfr And Sfrn (Forward And Reverse Shift Register)
7: B ASIC NSTRUCTIONS SFR and SFRN (Forward and Reverse Shift Register) The shift register consists of a total of 64 bits (all-in-one 10-I/O type CPU module) or 128 bits (other CPU modules) which are allocated to R0 through R63 or R127, respectively. Any number of available bits can be selected to form a train of bits which store on or off status.
Page 203 7: B ASIC NSTRUCTIONS Forward Shift Register (SFR), continued Ladder Diagram Program List Reset Instruction Data Pulse Data Timing Chart Reset Input I0 One scan or more is required Pulse Input I1 Data Input I2 R0/Q0 R1/Q1 R2/Q2 R3/Q3 Ladder Diagram Program List Reset Instruction...
Page 204 7: B ASIC NSTRUCTIONS Reverse Shift Register (SFRN) For reverse shifting, use the SFRN instruction. When SFRN instructions are programmed, two addresses are always required. The SFRN instructions are entered, followed by a shift register number selected from appropriate operand num- bers.
Page 205 7: B ASIC NSTRUCTIONS Bidirectional Shift Register A bidirectional shift register can be created by ﬁrst programming the SFR instruction as detailed in the Forward Shift Reg- ister section on page 7-18. Next, the SFRN instruction is programed as detailed in the Reverse Shift Register section on page 7-20.
Page 206: Sotu And Sotd (Single Output Up And Down)
7: B ASIC NSTRUCTIONS SOTU and SOTD (Single Output Up and Down) The SOTU instruction “looks for” the transition of a given input from off to on. The SOTD instruction looks for the transi- tion of a given input from on to off. When this transition occurs, the desired output will turn on for the length of one scan. The SOTU or SOTD instruction converts an input signal to a “one-shot”...
Page 207: Mcs And Mcr (Master Control Set And Reset)
7: B ASIC NSTRUCTIONS and MCR (Master Control Set and Reset) The MCS (master control set) instruction is usually used in combination with the MCR (master control reset) instruction. The MCS instruction can also be used with the END instruction, instead of the MCR instruction. When the input preceding the MCS instruction is off, the MCS is executed so that all inputs to the portion between the MCS and the MCR are forced off.
Page 208 7: B ASIC NSTRUCTIONS MCS and MCR (Master Control Set and Reset), continued Multiple Usage of MCS instructions Ladder Diagram Program List Instruction Data This master control circuit will give priority to I1, I3, and I5, in that order. When input I1 is off, the ﬁrst MCS is executed so that subsequent inputs I2 through I6 are forced off. When input I1 is on, the ﬁrst MCS is not executed so that the following program is executed according to the actual input statuses of I2 through I6.
Page 209: Jmp (Jump) And Jend (Jump End)
7: B ASIC NSTRUCTIONS JMP (Jump) and JEND (Jump End) The JMP (jump) instruction is usually used in combination with the JEND (jump end) instruction. At the end of a program, the JMP instruction can also be used with the END instruction, instead of the JEND instruction. These instructions are used to proceed through the portion of the program between the JMP and the JEND without pro- cessing.
Page 210: End
7: B ASIC NSTRUCTIONS JMP (Jump) and JEND (Jump End), continued Ladder Diagram Program List Instruction Data JEND JEND This jump circuit will give priority to I1, I3, and I5, in that order. When input I1 is on, the ﬁrst JMP is executed so that subsequent output statuses of Q0 through Q2 are held. When input I1 is off, the ﬁrst JMP is not executed so that the following program is executed according to the actual input statuses of I2 through I6.
Page 211: Advanced Instruction List
8: A DVANCED NSTRUCTIONS Introduction This chapter describes general rules of using advanced instructions, terms, data types, and formats used for advanced instructions. Advanced Instruction List Data Type Qty of Group Symbol Name Bytes Page No Operation Move MOVN Move Not IMOV Indirect Move 24 to 28...
Page 212 8: A DVANCED NSTRUCTIONS Data Type Qty of Group Symbol Name Bytes Page HTOB Hex to BCD 14-1 BTOH BCD to Hex 14-2 HTOA Hex to ASCII 14-3 ATOH ASCII to Hex 14-5 BTOA BCD to ASCII 14-7 Data Conversion ATOB ASCII to BCD 14-9...
Page 213: Advanced Instruction Applicable Cpu Modules
Advanced Instruction Applicable CPU Modules Applicable advanced instructions depend on the type of CPU modules as listed in the table below. All-in-One Type CPU Modules Slim Type CPU Modules FC4A-D20RK1 Group Symbol FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C...
Page 214 8: A DVANCED NSTRUCTIONS All-in-One Type CPU Modules Slim Type CPU Modules FC4A-D20RK1 Group Symbol FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C FC4A-C16R2C FC4A-C24R2C FC4A-D20S3 FC4A-D40K3 FC4A-D40S3 WKTIM Week Programmer WKTBL DISP Interface DGRD TXD1 TXD2 User Communication RXD1 RXD2 LABEL...
Page 215: Structure Of An Advanced Instruction
8: A DVANCED NSTRUCTIONS Structure of an Advanced Instruction Source Operand Destination Operand Opcode The opcode is a symbol to identify the advanced instruction. Opcode Repeat Cycles Data Type Speciﬁes the word (W) or integer (I) data type. MOV(W) S1 R D1 R ***** *****...
Page 216: Data Types For Advanced Instructions
8: A DVANCED NSTRUCTIONS Data Types for Advanced Instructions When using the move, data comparison, and binary arithmetic instructions, data types can be selected from word (W) or integer (I). For other advanced instructions, the data is processed in units of 16-bit word; except the coordinate conversion instructions use the integer data type.
Page 217: Nop (No Operation)
8: A DVANCED NSTRUCTIONS NOP (No Operation) No operation is executed by the NOP instruction. The NOP instruction may serve as a place holder. Another use would be to add a delay to the CPU scan time, in order to simulate communication with a machine or application, for debugging purposes. The NOP instruction does not require an input and operand.
Page 218 8: A DVANCED NSTRUCTIONS « FC4A M ’ » ICRO MART ANUAL...
Page 219: Mov (Move)
S1 → D1 MOV(*) S1(R) D1(R) When input is on, 16- bit data from operand designated by S1 is moved to ***** ***** operand designated by D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant...
Page 220: Move Instructions
9: M NSTRUCTIONS Examples: MOV The following examples are described using the word data type. Data move operation for the integer data type is the same for the word data type. D10 → M0 MOV(W) S1 – D1 – When input I2 is on, the data in data register D10 designated by source operand S1 is moved to 16 internal relays starting with M0 designated by destination operand D1.
Page 221 9: M NSTRUCTIONS Repeat Bit Operands The MOV (move) instruction moves 16-bit data. When a bit operand such as input, output, internal relay, or shift register is designated as the source or destination operand, 16 bits starting with the one designated by S1 or D1 are the target data. If a repeat operation is designated for a bit operand, the target data increases in 16-bit increments.
Page 222: Movn (Move Not)
S1(R) D1(R) When input is on, 16-bit data from operand designated by S1 is inverted ***** ***** bit by bit and moved to operand designated by D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand...
Page 223: Imov (Indirect Move)
S1 and S2 are added to determine the source of data. The 16-bit data so determined is moved to destina- tion, which is determined by the sum of values contained in operands designated by D1 and D2. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 224: Imovn (Indirect Move Not)
S1 and S2 are added to determine the source of data. The 16-bit data so determined is inverted and moved to destination, which is determined by the sum of values contained in operands designated by D1 and D2. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 225: Bmov (Block Move)
D1+1 Second 16-bit data Block Move S1+2 Third 16-bit data D1+2 Third 16-bit data S1+N–1 Nth 16-bit data D1+N–1 Nth 16-bit data Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — — — Valid Operands Operand Function...
Page 226: Ibmv (Indirect Bit Move)
S1 and S2 are added to determine the source of data. The 1-bit data so determined is moved to desti- nation, which is determined by the sum of values con- tained in operands designated by D1 and D2. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 227 9: M NSTRUCTIONS D10 + 5 → D20 + 12 IBMV S1 – D1 – SOTU Since source operand S1 is a data register and the value of Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 source operand S2 is 5, the source data is bit 5 of data register D10 designated by source operand S1.
Page 228: Ibmvn (Indirect Bit Move Not)
S1 and S2 are added to determine the source of data. The 1-bit data so determined is inverted and moved to destination, which is determined by the sum of values contained in operands designated by D1 and D2. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 229: Cmp= (Compare Equal To)
10: D OMPARISON NSTRUCTIONS Introduction Data can be compared using data comparison instructions, such as equal to, unequal to, less than, greater than, less than or equal to, and greater than or equal to. When the comparison result is true, an output or internal relay is turned on. The repeat operation can also be used to compare more than one set of data.
Page 230 10: D OMPARISON NSTRUCTIONS Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant Repeat S1 (Source 1) Data to compare 1-99 S2 (Source 2) Data to compare 1-99 ▲ — — — — D1 (Destination 1) Comparison output —...
Page 231 10: D OMPARISON NSTRUCTIONS Repeat Operation in the Data Comparison Instructions The following examples are described using the CMP≥ instruction of the word data type. Repeat operation for all other data comparison instructions and the integer data type is the same for the following examples. Repeat One Source Operand When only S1 (source) is designated to repeat, source operands (as many as the repeat cycles, starting with the operand designated by S1) are compared with the operand designated by S2.
Page 232: Icmp>= (Interval Compare Greater Than Or Equal To)
***** ***** ***** S3 are compared. When the condition is met, destination operand D1 is turned on. When the condition is not met, D1 is turned off. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — —...
Page 233: Add (Addition)
M8004 (user program execution error) are turned on. A user program execution error also occurs in the following divi- sion operation. Data type I: –32768 ÷ (–1) Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 « FC4A M ’...
Page 234 11: B INARY RITHMETIC NSTRUCTIONS Valid Operands Operand Function Constant Repeat S1 (Source 1) Data for calculation 1-99 S2 (Source 2) Data for calculation 1-99 ▲ D1 (Destination 1) Destination to store results — — 1-99 For the valid operand number range, see pages 6-1 and 6-2. ▲...
Page 235 11: B INARY RITHMETIC NSTRUCTIONS Example: SUB • Data Type: Word The following example demonstrates the use of special internal relay M8003 to process a borrow. D12 – 7000 → D12 SUB(W) S1 – S2 – D1 – SOTU To process borrowing so that the number of times 7000 a borrow occurs is subtracted from D13.
Page 236 11: B INARY RITHMETIC NSTRUCTIONS Repeat Operation in the ADD and SUB Instructions Source operands S1 and S2 and destination operand D1 can be designated to repeat individually or in combination. When destination operand D1 is not designated to repeat, the ﬁnal result is set to destination operand D1. When repeat is desig- nated, consecutive operands as many as the repeat cycles starting with the designated operand are used.
Page 237 11: B INARY RITHMETIC NSTRUCTIONS Repeat Operation in the MUL Instruction Since the MUL (multiplication) instruction uses two destination operands, the result is stored to destination operands as described below. Source operands S1 and S2 and destination operand D1 can be designated to repeat individually or in combination.
Page 238 11: B INARY RITHMETIC NSTRUCTIONS Repeat Operation in the DIV Instruction Since the DIV (division) instruction uses two destination operands, the quotient and remainder are stored as described below. Source operands S1 and S2 and destination operand D1 can be designated to repeat individually or in combination. When destination operand D1 is not designated to repeat, the ﬁnal result is set to destination operand D1 (quotient) and D1+1 (remainder).
Page 239: Root (Root)
D1. Valid values are 0 to 65535. The square root is calculated to two decimals, omit- ting the ﬁgures below the second place of decimals. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 240 11: B INARY RITHMETIC NSTRUCTIONS 11-8 « FC4A M ’ » ICRO MART ANUAL...
Page 241: Andw (And Word)
S2 are exclusive ORed, bit by bit. The result is set to desti- nation operand D1. S1 = 1 S2 = 1 D1 = 0 Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 « FC4A M ’...
Page 242 12: B OOLEAN OMPUTATION NSTRUCTIONS Valid Operands Operand Function Constant Repeat S1 (Source 1) Data for computation 1-99 S2 (Source 2) Data for computation 1-99 ▲ D1 (Destination 1) Destination to store results — — 1-99 For the valid operand number range, see pages 6-1 and 6-2. ▲...
Page 243 12: B OOLEAN OMPUTATION NSTRUCTIONS Repeat Operation in the ANDW, ORW, and XORW Instructions Source operands S1 and S2 and destination operand D1 can be designated to repeat individually or in combination. When destination operand D1 is not designated to repeat, the ﬁnal result is set to destination operand D1. When repeat is desig- nated, consecutive operands as many as the repeat cycles starting with the designated operand are used.
Page 244 12: B OOLEAN OMPUTATION NSTRUCTIONS 12-4 « FC4A M ’ » ICRO MART ANUAL...
Page 245: Sftl (Shift Left)
(special internal relay M8003). Zeros are set to the LSB. When bits to shift = 1 Before shift: M8003 Shift to the left After shift: M8003 Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant Repeat ▲...
Page 246 13: S HIFT OTATE NSTRUCTIONS Example: SFTL M8120 is the initialize pulse special internal relay. MOV(W) S1 – D1 – When the CPU starts operation, the MOV (move) instruction sets 43690 43690 M8120 to data register D10. SFTL(W) bits SOTU Each time input I0 is turned on, 16-bit data of data register D10 is shifted to the left by 1 bit as designated by operand bits.
Page 247: Sftr (Shift Right)
(special internal relay M8003). Zeros are set to the MSB. When bits to shift = 1 Before shift: Shift to the right M8003 After shift: M8003 Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant Repeat ▲...
Page 248: Bcdls (Bcd Left Shift)
Zeros are set to the lowest digits as many as the digits shifted. When S2 = 1 ( digits to shift) S1+1 Before shift: Shift to the left After shift: Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — —...
Page 249: Wsft (Word Shift)
Second 16-bit data D1+3 Fourth 16-bit data 3 blocks (S2) D1+3 Third 16-bit data D1+4 Fifth 16-bit data D1+4 Fifth 16-bit data Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — — — Valid Operands Operand Function...
Page 250: Rotl (Rotate Left)
The result is set to the source operand S1, and the last bit status rotated out is set to a carry (special internal relay M8003). When bits to rotate = 1 Before rotation: M8003 Rotate to the left After rotation: M8003 Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant Repeat ▲...
Page 251: Rotr (Rotate Right)
(special internal relay M8003). When bits to rotate = 1 Before rotation: Rotate to the right M8003 After rotation: M8003 Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands Operand Function Constant Repeat ▲...
Page 252 13: S HIFT OTATE NSTRUCTIONS 13-8 « FC4A M ’ » ICRO MART ANUAL...
Page 253: Htob (Hex To Bcd)
When input is on, the 16-bit data designated by S1 is converted into BCD and ***** ***** stored to the destination designated by operand D1. Valid values for the source operand are 0 through 9999. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands...
Page 254: Btoh (Bcd To Hex)
When input is on, the BCD data designated by S1 is converted into 16-bit binary ***** ***** data and stored to the destination designated by operand D1. Valid values for the source operand are 0 through 9999 (BCD). Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 Valid Operands...
Page 255: Htoa (Hex To Ascii)
S2, con- verted into ASCII data, and stored to the destination starting with the operand designated by D1. The quantity of digits to convert can be 1 through 4. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 256 14: D ONVERSION NSTRUCTIONS Examples: HTOA • Quantity of Digits: 4 Binary ASCII HTOA(W) SOTU 4660 D10 (1234h) D20 (0031h) D21 (0032h) D22 (0033h) D23 (0034h) • Quantity of Digits: 3 Binary ASCII HTOA(W) SOTU 4660 D10 (1234h) D20 (0032h) D21 (0033h) D22 (0034h) •...
Page 257: Atoh (Ascii To Hex)
D1. Valid values for source data to convert are 30h to 39h and 41h to 46h. The quantity of digits to convert can be 1 through 4. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 258 14: D ONVERSION NSTRUCTIONS Examples: ATOH • Quantity of Digits: 4 ASCII Binary ATOH(W) SOTU 4660 D10 (0031h) D20 (1234h) D11 (0032h) D12 (0033h) D13 (0034h) • Quantity of Digits: 3 ASCII Binary ATOH(W) SOTU D10 (0031h) D20 (0123h) D11 (0032h) D12 (0033h) •...
Page 259: Btoa (Bcd To Ascii)
S2. The result is stored to the destination starting with the operand designated by D1. The quantity of digits to convert can be 1 through 5. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 260 14: D ONVERSION NSTRUCTIONS Examples: BTOA • Quantity of Digits: 5 ASCII Binary BTOA(W) SOTU 12345 D10 (3039h) D20 (0031h) D21 (0032h) D22 (0033h) D23 (0034h) D24 (0035h) • Quantity of Digits: 4 ASCII Binary BTOA(W) SOTU 12345 D10 (3039h) D20 (0032h) D21 (0033h) D22 (0034h)
Page 261: Atob (Ascii To Bcd)
16-bit binary data. The result is stored to the destination designated by operand D1. Valid values for source data to convert are 30h through 39h. The quantity of digits to convert can be 1 through 5. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 262 14: D ONVERSION NSTRUCTIONS Examples: ATOB • Quantity of Digits: 5 ASCII Binary ATOB(W) SOTU 12345 D10 (0031h) D20 (3039h) D11 (0032h) D12 (0033h) D13 (0034h) D14 (0035h) • Quantity of Digits: 4 ASCII Binary ATOB(W) SOTU 1234 D10 (0031h) D20 (04D2h) D11 (0032h) D12 (0033h)
Page 263: Enco (Encode)
Bits ***** ***** set point (offset) is stored to the destination designated by operand D1. If no point is on in the searched area, 65535 is stored to D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 264: Deco (Decode)
When input is on, the values contained in operands designated by S1 and D1 are DECO added to determine the destination, and the bit so determined is turned on. ***** ***** Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 265: Bcnt (Bit Count)
S1. Source ***** ***** ***** operand S2 designates the quantity of bits searched. The quantity of bits which are on is stored to the destination designated by operand D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — —...
Page 266: Alt (Alternate Output)
The ALT instruction must be used with a SOTU or SOTD instruction, otherwise the designated output, internal relay, or shift register bit repeats to turn on and off in each scan. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 267: Wktim (Week Timer)
When the current day and time reach the presets, an output or internal relay designated by operand D1 is turned on, depend- ing on the week table output control designated by MODE. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 268: Wktbl (Week Table)
The special days stored in the week table are used to add or skip days to turn on or off the comparison outputs pro- grammed in subsequent WKTIM instructions. The WKTBL must precede the WKTIM instructions. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 269 15: W ROGRAMMER NSTRUCTIONS S1 through S — Special month/day data Specify the months and days to add or skip days to turn on or off the comparison outputs programmed in WKTIM instructions. Month 01 through 12 01 through 31 Example: To set July 4 as a special day, designate 704 as S1.
Page 270 15: W ROGRAMMER NSTRUCTIONS • Keep Output ON across 0 a.m. When the hour/minute comparison data to turn on (S2) is larger than the hour/minute comparison data to turn off (S3), the comparison ON output (D1) turns on at S2 on the day designated by S1, remains on across 0 a.m., and turns off at S3 on the next day.
Page 271: Setting Calendar/Clock Using Windldr
15: W ROGRAMMER NSTRUCTIONS Setting Calendar/Clock Using WindLDR Before using the clock cartridge for the ﬁrst time, the calendar/clock data in the clock cartridge must be set using WindLDR or executing a user program to transfer correct calendar/clock data from special data registers allocated to the calendar/ clock.
Page 272: Adjusting Clock Using A User Program
15: W ROGRAMMER NSTRUCTIONS Special Internal Relays for Calendar/Clock Data When M8016 is turned on, data in data registers D8015 through D8018 (calendar M8016 Calendar Data Write Flag new data) are set to the clock cartridge installed on the CPU module. When M8017 is turned on, data in data registers D8019 through D8021 (clock M8017 Clock Data Write Flag...
Page 273: Adjusting Clock Cartridge Accuracy
15: W ROGRAMMER NSTRUCTIONS Adjusting Clock Cartridge Accuracy The optional clock cartridge (FC4A-PT1) has an initial monthly error of ±2 minutes at 25°C. The accuracy of the clock cartridge can be improved to ±30 seconds using Enable Clock Cartridge Adjustment in the Function Area Settings. Before starting the clock cartridge adjustment, conﬁrm the adjustment value indicated on the clock cartridge.
Page 274 15: W ROGRAMMER NSTRUCTIONS 15-8 « FC4A M ’ » ICRO MART ANUAL...
Page 275: Disp (Display)
1 to 4 (hex) Display data can be 0 through 65535 (FFFFh). Latch phase: Conversion: Low or High BCD or BIN Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — Note: The DISP instruction requires transistor output terminals. When using all-in-one 24-I/O type CPU module FC4A-C24R2 or FC4A-C24R2C, connect a transistor output module.
Page 276 The following example demonstrates a program to display the 4-digit current value of counter CNT10 on 7-segment dis- play units (IDEC’s DD3S-F31N) connected to the transistor sink output module. When input I0 is on, the 4-digit current value of counter C10 is dis- DISP played on 7-segment digital display units.
Page 277: Dgrd (Digital Read)
FFFFh. Quantity of digits: 1 to 5 (decimal) 1 to 4 (hex) Conversion: BCD or BIN Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — Note: The DGRD instruction requires transistor output terminals. When using all-in-one 24-I/O type CPU module FC4A-C24R2 or FC4A-C24R2C, connect a transistor output module.
Page 278 Example: DGRD The following example demonstrates a program to read data from four digital switches (IDEC’s DFBN-031D-B) to a data register in the CPU module, using a 8-point DC input module and a 16-point transistor sink output module.
Page 279: User Communication Overview
CPU modules and system program version are shown in the table below. For the procedure to conﬁrm the system pro- gram version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C...
Page 280: User Communication Mode Specifications
17: U OMMUNICATION NSTRUCTIONS User Communication Mode Speciﬁcations Type RS232C User Communication RS485 User Communication Communication Port Port 1 and Port 2 Port 2 Connection Device Quantity 1 per port 31 maximum Standards EIA RS232C EIA RS485 Baud Rate 1200, 2400, 4800, 9600, 19200 bps Data Bits 7 or 8 bits Parity...
Page 281: Rs232C User Communication System Setup
17: U OMMUNICATION NSTRUCTIONS RS232C User Communication System Setup Attach a proper connector to the RS232C Equipment open end referring to the cable connector pinouts shown below. User Communication Cable 1C To RS232C Port FC2A-KP1C 2.4m (7.87 ft.) long To Port 1 (RS232C) To Port 2 RS232C Communication Adapter FC4A-PC1...
Page 282: Connecting Rs485 Equipment Through Rs485 Port 2
17: U OMMUNICATION NSTRUCTIONS Connecting RS485 Equipment through RS485 Port 2 Upgraded slim type CPU modules can use the RS485 user communication function. Using the RS485 user communica- tion, a maximum of 31 RS485 devices can be connected to the CPU module.
Page 283: Programming Windldr
17: U OMMUNICATION NSTRUCTIONS Programming WindLDR When using the user communication function to communicate with an external RS232C or RS485 device, set the commu- nication parameters for the to match those of the external device. MicroSmart Note: Since communication parameters in the Function Area Settings relate to the user program, the user program must be downloaded to the MicroSmart CPU module after changing any of these settings.
Page 284: Txd1 (Transmit 1)
1 to a remote terminal with an ***** ***** ***** RS232C port. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 TXD2 (Transmit 2) When input is on, data designated by S1 is converted into a speciﬁed...
Page 285 17: U OMMUNICATION NSTRUCTIONS User Communication Transmit Instruction Dialog Box in WindLDR Selections and Operands in Transmit Instruction Dialog Box Transmit instruction Type Receive instruction Port 1 Transmit user communication through port 1 (TXD1) Port Port 2 Transmit user communication through port 2 (TXD2) Enter the data to transmit in this area.
Page 286 17: U OMMUNICATION NSTRUCTIONS Example: The following example shows two methods to enter 3-byte ASCII data “1” (31h), “2” (32h), “3” (33h). (1) Constant (Character) (2) Constant (Hexadecimal) Designating Data Register as S1 When a data register is designated as source operand S1, conversion type and transmit digits must also be designated. The data stored in the designated data register is converted and a designated quantity of digits of the resultant data is transmit- ted.
Page 287 17: U OMMUNICATION NSTRUCTIONS Transmit Digits (Bytes) After conversion, the transmit data is taken out in speciﬁed digits. Possible digits depend on the selected conversion type. Example: D10 stores 010Ch (268) (1) Binary to ASCII conversion, Transmit digits = 2 ASCII data Transmitted data “0”...
Page 288 17: U OMMUNICATION NSTRUCTIONS BCC (Block Check Character) Block check characters can be appended to the transmit data. The start position for the BCC calculation can be selected from the ﬁrst byte through the 15th byte. The BCC, calculated in either XOR or ADD, can be 1 or 2 digits. Upgraded CPU modules can also use ADD-2comp, Modbus ASCII, and Modbus RTU to calculate the BCC.
Page 289 17: U OMMUNICATION NSTRUCTIONS Conversion Type The BCC calculation result can be converted or not according to the designated conversion type as described below: Example: BCC calculation result is 0041h. (1) Binary to ASCII conversion ASCII data Note: On WindLDR, Modbus ASCII is “4”...
Page 290 17: U OMMUNICATION NSTRUCTIONS Transmit Data Byte Count The data register next to the operand designated for transmit status stores the byte count of data transmitted by the TXD instruction. When BCC is included in the transmit data, the byte count of the BCC is also included in the transmit data byte count.
Page 291 17: U OMMUNICATION NSTRUCTIONS 2. Check that TXD is selected in the Type box and click Port 1 in the Port box. Then, click Insert. The Data Type Selection dialog box appears. You will program source operand S1 using this dialog box. 3.
Page 292 17: U OMMUNICATION NSTRUCTIONS 6. Once again in the Data Type Selection dialog box, click Constant (Hexadecimal) and click OK. Next, in the Constant (Hexadecimal) dialog box, type 03 to program the end delimiter ETX (03h). When ﬁnished, click OK. 7.
Page 293: Rxd1 (Receive 1)
***** ***** ***** designated by S1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 RXD2 (Receive 2) When input is on, data received through port 2 from a remote terminal is...
Page 294 17: U OMMUNICATION NSTRUCTIONS User Communication Receive Instruction Dialog Box in WindLDR Selections and Operands in Receive Instruction Dialog Box Transmit instruction Type Receive instruction Port 1 Receive user communication through port 1 (RXD1) Port Port 2 Receive user communication through port 2 (RXD2) Enter the receive format in this area.
Page 295 17: U OMMUNICATION NSTRUCTIONS Receive Digits The received data is divided into a block of speciﬁed receive digits before conversion as described below: Example: Received data of 6 bytes are divided in different receive digits. (Repeat is also designated.) (1) Receive digits = 2 (2) Receive digits = 3 “1”...
Page 296 17: U OMMUNICATION NSTRUCTIONS (2) Repeat cycles = 3 “1” “2” “3” “4” “5” “6” (31h) (32h) (33h) (34h) (35h) (36h) 2 digits 2 digits 2 digits 1st block 2nd block 3rd block ASCII to Binary conversion 0012h Repeat 1 0034h Repeat 2 0056h...
Page 297 17: U OMMUNICATION NSTRUCTIONS (2) When RXD1/RXD2 instructions with start delimiters STX (02h) and ENQ (05h) are executed Incoming Data “1” “2” “3” (02h) (31h) (32h) (33h) “A” “B” “C” (05h) (41h) (42h) (43h) D100 **** h RXD Instruction 1 D101 **** h STX (02h)
Page 298 17: U OMMUNICATION NSTRUCTIONS Example: (1) When a RXD instruction without an end delimiter is executed D100 **** h Incoming data When D100 is designated as the first data register “0” “1” “2” “3” D101 **** h (30h) (31h) (32h) (33h) Total of received characters **** h...
Page 299 17: U OMMUNICATION NSTRUCTIONS BCC (Block Check Character) has an automatic BCC calculation function to detect a communication error in incoming data. If a BCC MicroSmart code is designated in the receive format of a RXD instruction, the calculates a BCC value for a speciﬁed start- MicroSmart ing position through the position immediately preceding the BCC and compares the calculation result with the BCC code in the received incoming data.
Page 300 17: U OMMUNICATION NSTRUCTIONS Conversion Type The BCC calculation result can be converted or not according to the designated conversion type as described below: Example: BCC calculation result is 0041h. (1) Binary to ASCII conversion Note: On WindLDR, Modbus ASCII is “4”...
Page 301 17: U OMMUNICATION NSTRUCTIONS Example 2: BCC is calculated for the ﬁrst byte through the sixth byte using the ADD format, converted in binary to ASCII, and compared with the BCC code appended to the seventh and eighth bytes of the incoming data. Incoming Data “1”...
Page 302 17: U OMMUNICATION NSTRUCTIONS Receive Data Byte Count The data register next to the operand designated for receive status stores the byte count of data received by the RXD instruction. When a start delimiter, end delimiter, and BCC are included in the received data, the byte counts for these codes are also included in the receive data byte count.
Page 303 17: U OMMUNICATION NSTRUCTIONS 2. Check that RXD is selected in the Type box and click Port 1 in the Port box. Then, click Insert. The Data Type Selection dialog box appears. You will program source operand S1 using this dialog box. 3.
Page 304 17: U OMMUNICATION NSTRUCTIONS 6. Again in the Data Type Selection dialog box, click BCC and click OK. Next, in the BCC dialog box, enter 1 in the Cal- culation Start Position box, click ADD for the Calculation Type, click BIN to ASCII for the Conversion Type, and click 2 for the Digits.
Page 305: User Communication Error
17: U OMMUNICATION NSTRUCTIONS User Communication Error When a user communication error occurs, a user communication error code is stored in the data register designated as a transmit status in the TXD instruction or as a receive status in the RXD instruction. When multiple errors occur, the ﬁnal error code overwrites all preceding errors and is stored in the status data register.
Page 306: Ascii Character Code Table
17: U OMMUNICATION NSTRUCTIONS ASCII Character Code Table Upper Lower E SP Decimal Decimal ” Decimal Decimal Decimal Decimal & Decimal ’ Decimal BS C A N Decimal HT EM Decimal LF S U B Decimal VT E S C Decimal <...
Page 307: Rs232C Line Control Signals
17: U OMMUNICATION NSTRUCTIONS RS232C Line Control Signals While the is in the user communication mode, special data registers can be used to enable or disable DSR and MicroSmart DTR control signal options for port 2. Port 2 is available on the 16- and 24-I/O type CPU modules only, and an optional RS232C adapter must be installed on the port 2 connector to enable the RS232C communication.
Page 308 17: U OMMUNICATION NSTRUCTIONS DSR Input Control Signal Option D8105 Special data register D8105 is used to control data ﬂow between the MicroSmart RS232C port 2 and the remote terminal depending on the DSR (data set ready) signal sent from the remote terminal. The DSR signal is an input to the MicroSmart to determine the status of the remote terminal.
Page 309 17: U OMMUNICATION NSTRUCTIONS D8106 = 1: Whether the MicroSmart is running or stopped, DTR remains off. Stopped Running Stopped MicroSmart DTR signal D8106 = 2: While the can receive data, DTR is turned on. While the can not receive MicroSmart MicroSmart data, DTR remains off.
Page 310: Sample Program - User Communication Txd
17: U OMMUNICATION NSTRUCTIONS Sample Program – User Communication TXD This example demonstrates a program to send data to a printer using the user communication TXD2 (transmit) instruction, with the optional RS232C communication adapter installed on the port 2 connector of the 24-I/O type CPU module. System Setup Printer RS232C Communication Adapter...
Page 311 17: U OMMUNICATION NSTRUCTIONS Setting User Communication Mode in WindLDR Function Area Settings Since this example uses the RS232C port 2, select User Protocol for Port 2 in the Function Area Settings using WindLDR See page 17-5. Setting Communication Parameters Set the communication parameters to match those of the printer.
Page 312: Sample Program - User Communication Rxd
17: U OMMUNICATION NSTRUCTIONS Sample Program – User Communication RXD This example demonstrates a program to receive data from a barcode reader with a RS232C port using the user communi- cation RXD1 (receive) instruction. System Setup User Communication Cable 1C Barcode Reader FC2A-KP1C To RS232C Port 1...
Page 313 17: U OMMUNICATION NSTRUCTIONS Conﬁguring Barcode Reader The values shown below are an example of conﬁguring a barcode reader. For actual settings, see the user’s manual for the barcode reader. Synchronization mode Auto Read mode Single read or multiple read Baud rate: 9600 bps Data bits:...
Page 314 17: U OMMUNICATION NSTRUCTIONS New BCC Calculation Examples The upgraded CPU modules can use three new BCC calculation formulas of ADD-2comp, Modbus ASCII, and Modbus RTU for transmit instructions TXD1 and TXD2 and receive instructions RXD1 and RXD2. Use ver. 4.40 or WindLDR higher to program the new BCC.
Page 315: Branching Instructions
In this way, scan time is minimized by not executing the program branch unless input condi- tions are satisﬁed. Note: The same label number cannot be used more than once. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3...
Page 316 18: P ROGRAM RANCHING NSTRUCTIONS Example: LJMP and LABEL The following example demonstrates a program to jump to three different portions of program depending on the input. When input I0 is on, program execution jumps to label 0. LJMP LJMP When input I1 is on, program execution jumps to label 1.
Page 317: Lcal (Label Call)
A maximum of four LCAL instructions can be nested. When more than four LCAL instruc- tions are nested, a user program execution error will result, turning on special internal relay M8004 and the ERR LED on the CPU module. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 318 18: P ROGRAM RANCHING NSTRUCTIONS Correct Structure for Calling Subroutine When a LCAL instruction is executed, the remaining program instructions on the same rung may not be executed upon return, if input conditions are changed by the subroutine. After the LRET instruction of a subroutine, program execution begins with the instruction following the LCAL instruction, depending on current input condition.
Page 319: Ioref (I/O Refresh)
M300 allocated to each input available on the CPU module. When Q (output) is used as S1, the output data in the RAM is immediately written to the actual output available on the CPU module. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 320 18: P ROGRAM RANCHING NSTRUCTIONS Example: IOREF The following example demonstrates a program to transfer the input I0 status to output Q0 using the IOREF instruction. Input I2 is designated as an interrupt input. For the interrupt input function, see page 5-20. M8120 is the initialize pulse special internal relay.
Page 321: Di (Disable Interrupt)
When input is on, interrupt inputs and timer interrupt designated by source operand S1 are disabled. EI (Enable Interrupt) When input is on, interrupt inputs and timer interrupt designated by source operand S1 are enabled. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 322 18: P ROGRAM RANCHING NSTRUCTIONS Example: DI and EI The following example demonstrates a program to disable and enable interrupt inputs and timer interrupt selectively. For the interrupt input and timer interrupt functions, see pages 5-20 and 5-22. In this example, inputs I2 and I3 are designated as interrupt inputs and timer interrupt is used with interrupt intervals of 100 ms.
Page 323: Conversion
Y values. Applicable CPU modules and system program version are shown in the table below. For the procedure to conﬁrm the system program version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C...
Page 324: Cvxty (Convert X To Y)
***** ***** the XYFS instruction. Operand S1 selects a format from a maximum of six XY conversion formats. The conversion result is set to the operand designated by D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 325: Cvytx (Convert Y To X)
***** ***** the XYFS instruction. Operand S1 selects a format from a maximum of six XY conversion formats. The conversion result is set to the operand designated by D1. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 326 19: C OORDINATE ONVERSION NSTRUCTIONS Valid Operands Operand Function Constant Repeat S1 (Source 1) Format number — — — — — — — 0 to 5 — 0 to 65535 S2 (Source 2) Y value — –32768 to 32767 ▲ D1 (Destination 1) Destination to store results —...
Page 327 19: C OORDINATE ONVERSION NSTRUCTIONS Example: Linear Conversion The following example demonstrates setting up two coordinate points to deﬁne the linear relationship between X and Y. The two points are (X0, Y0) = (0, 0) and (X1, Y1) = (8000, 4000). Once these are set, there is an X to Y conversion, as well as a Y to X conversion.
Page 328 19: C OORDINATE ONVERSION NSTRUCTIONS Example: Overlapping Coordinates In this example, the XYFS instruction sets up three coordinate points, which deﬁne two different linear relationships between X and Y. The three points are: (X0, Y0) = (0, 100), (X1, Y1) = (100, 0), and (X2, Y2) = (300, 100). The two line segments deﬁne overlapping coordinates for X.
Page 329: Puls1 (Pulse Output 1)
PULS and RAMP instructions. Applicable CPU modules and system program versions are shown in the table below. For the procedure to conﬁrm the system program version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C...
Page 330 20: P ULSE NSTRUCTIONS Valid Operands Operand Function Constant Repeat S1 (Source 1) Control register — — — — — — — — D1 (Destination 1) Status relay — — — — — — — — Source operand S1 (control register) uses 8 data registers starting with the operand designated as S1. Data registers D0 through D1292 and D2000 through D7992 can be designated as S1.
Page 331 20: P ULSE NSTRUCTIONS S1+2 Pulse Counting Pulse counting can be enabled for the PULS1 instruction only. With pulse counting enabled, PULS1 generates a predeter- mined number of output pulses as designated by operands S1+3 and S1+4. With pulse counting disabled, PULS1 or PULS2 generates output pulses while the start input for the PULS instruction remains on.
Page 332 20: P ULSE NSTRUCTIONS D1+1 Pulse Output Complete The internal relay designated by operand D1+1 turns on when the PULS1 instruction has completed generating a predeter- mined number of output pulses or when either PULS instruction is stopped to generate output pulses. When the start input for the PULS instruction is turned on, the internal relay designated by operand D1+1 turns off.
Page 333 20: P ULSE NSTRUCTIONS Timing Chart for Disable Pulse Counting This program demonstrates a timing chart of the PULS2 instruction without pulse counting. D102 = 0 (disable pulse counting) PULS D100 Start Input I1 Output Pulse Frequency D101 Output Pulse Q1 Pulse Output ON M20 Pulse Output Complete M21 •...
Page 334 20: P ULSE NSTRUCTIONS Sample Program: PULS1 This program demonstrates a user program of the PULS1 instruction to generate 1,000 pulses at a frequency of 3 kHz from output Q0, followed by 3,000 pulses at a frequency of 5 kHz. Operand Settings Operand Function...
Page 335: Pwm1 (Pulse Width Modulation 1)
Note: The PWM1 and PWM2 instructions can be used only once in a user program. When PWM1 or PWM2 is not used, unused output Q0 or Q1 can be used for another pulse instruction or ordinary output. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 336 20: P ULSE NSTRUCTIONS S1+0 Output Pulse Frequency The value stored in the data register designated by operand S1+0 determines the pulse output frequency. 0: 6.81 Hz (146.84 ms period) 1: 27.26 Hz (36.68 ms period) 2: 217.86 Hz (4.59 ms period) S1+1 Pulse Width Ratio The value stored in the data register designated by operand S1+1 speciﬁes the pulse width ratio of the pulse output in per- cent of the period determined by the output pulse frequency selected with S1+0.
Page 337 20: P ULSE NSTRUCTIONS Destination Operand D1 (Status Relay) Three internal relays starting with the operand designated by D1 indicate the status of the PWM instruction. These oper- ands are for read only. Operand Function Description 0: Pulse output OFF D1+0 Pulse output ON 1: Pulse output ON...
Page 338 20: P ULSE NSTRUCTIONS Timing Chart for Enable Pulse Counting This program demonstrates a timing chart of the PWM1 instruction when pulse counting is enabled. D202 = 1 (enable pulse counting) D200 Start Input I0 Pulse Width Ratio D201 PWR1 PWR2 PWR3 Preset Value D203·D204...
Page 339 20: P ULSE NSTRUCTIONS Timing Chart for Disable Pulse Counting This program demonstrates a timing chart of the PWM2 instruction without pulse counting. D102 = 0 (disable pulse counting) D100 Start Input I1 Pulse Width Ratio D101 PWR1 PWR2 PWR3 PWR1 PWR2 Output Pulse Q1...
Page 340 20: P ULSE NSTRUCTIONS Sample Program: PWM1 This program demonstrates a user program of the PWM1 instruction to generate pulses from output Q0, with an ON/OFF ratio of 30% while input I0 is off or 60% when input I0 is on. Operand Settings Operand Function...
Page 341: Ramp (Ramp Control)
Note: The RAMP instruction can be used only once in a user program. When RAMP is used with reversible control disabled, unused output Q1 can be used for another pulse instruction PULS2, PWM2, or ZRN2 or ordinary output. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 342 20: P ULSE NSTRUCTIONS Operand Function Description 0: Reversible control disabled S1+4 Reversible control enable 1: Reversible control (single-pulse output) 2: Reversible control (dual-pulse output) 0: Forward S1+5 Control direction 1: Reverse S1+6 Preset value (high word) 1 to 100,000,000 (05F5 E100h) S1+7 Preset value (low word) S1+8...
Page 343 20: P ULSE NSTRUCTIONS S1+3 Frequency Change Rate / Frequency Change Time When S1+0 is set to 0 through 2, the value stored in the data register designated by operand S1+3 speciﬁes the rate of pulse output frequency change for a period of 10 ms in percent of the maximum of the frequency range selected by S1+0. When S1+0 is set to 0 (10 to 1,000 Hz) or 1 (100 to 10,000 Hz), valid values for operand S1+3 are 1 through 100, thus the frequency change rate can be 10 to 1,000 Hz or 100 to 10,000 Hz, respectively.
Page 344 20: P ULSE NSTRUCTIONS S1+5 Control Direction When S1+4 is set to 1 or 2 to enable reversible control, the value stored in the data register designated by operand S1+5 speciﬁes the control direction. 0: Forward 1: Reverse S1+6 Preset Value (High Word) S1+7 Preset Value (Low Word) The RAMP instruction generates a predetermined number of output pulses as designated by operands S1+6 and S1+7.
Page 345 20: P ULSE NSTRUCTIONS Destination Operand D1 (Status Relay) Four internal relays starting with the operand designated by D1 indicate the status of the RAMP instruction. These oper- ands are for read only. Operand Function Description 0: Pulse output OFF D1+0 Pulse output ON 1: Pulse output ON...
Page 346 20: P ULSE NSTRUCTIONS Timing Chart for Reversible Control Disabled This program demonstrates a timing chart of the RAMP instruction when reversible control is disabled. D204 = 0 (reversible control disabled) RAMP D200 Start Input I0 Steady Pulse Frequency Initial Pulse Frequency Output Pulse Q0 Pulse Output ON M50 Pulse Output Complete M51...
Page 347 20: P ULSE NSTRUCTIONS Timing Chart for Reversible Control with Single Pulse Output This program demonstrates a timing chart of the RAMP instruction when reversible control is enabled with single pulse output. D204 = 1 (reversible control with single pulse output) RAMP D200 Start Input I0...
Page 348 20: P ULSE NSTRUCTIONS Timing Chart for Reversible Control with Dual Pulse Output This program demonstrates a timing chart of the RAMP instruction when reversible control is enabled with dual pulse output. D204 = 2 (reversible control with dual pulse output) RAMP D200 Start Input I0...
Page 349 20: P ULSE NSTRUCTIONS Sample Program: RAMP — Reversible Control Disabled This program demonstrates a user program of the RAMP instruction to generate 10,000 pulses from output Q0. Steady pulse frequency: 3,000 Hz Initial pulse frequency: 1,000 Hz Frequency change rate: 500 Hz / 10 ms Reversible control enable: Reversible control disabled...
Page 350 20: P ULSE NSTRUCTIONS Sample Program: RAMP — Reversible Control with Single Pulse Output This program demonstrates a user program of the RAMP instruction to generate 30,000 pulses from output Q0. Control direction output Q1 turns off or on while input I1 is off or on to indicate the forward or reverse direction, respectively. Steady pulse frequency: 5,000 Hz Initial pulse frequency:...
Page 351 20: P ULSE NSTRUCTIONS Sample Program: RAMP — Reversible Control with Dual Pulse Output This program demonstrates a user program of the RAMP instruction to generate 30,000 pulses from output Q0 (forward pulse) or Q1 (reverse pulse) while input I1 is off or on, respectively. Steady pulse frequency: 5,000 Hz Initial pulse frequency:...
Page 352: Zrn1 (Zero Return 1)
Note: The ZRN1 and ZRN2 instructions can be used only once in a user program. When ZRN1 or ZRN2 is not used, unused output Q0 or Q1 can be used for another pulse instruction or ordinary output. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 353 20: P ULSE NSTRUCTIONS S1+0 Initial Operation Mode The value stored in the data register designated by operand S1+0 determines the frequency range of the high-frequency initial pulse output. 0: 10 to 1,000 Hz 1: 100 to 10,000 Hz 2: 1,000 to 20,000 Hz S1+1 Initial Pulse Frequency The value stored in the data register designated by operand S1+1 speciﬁes the frequency of the initial pulse output in per- cent of the maximum of the frequency range selected by S1+0.
Page 354 20: P ULSE NSTRUCTIONS Source Operand S2 (Deceleration Input) When the deceleration input turns on while the ZRN instruction is generating output pulses of the initial pulse frequency, the pulse frequency is changed to the creep pulse frequency. When the deceleration input turns off, the ZRN instruction stops generating output pulses.
Page 355 20: P ULSE NSTRUCTIONS Timing Chart for Zero-return Operation This program demonstrates a timing chart of the ZRN1 instruction when input I2 is used for a high-speed deceleration input. D200 Start Input I0 Deceleration Input I2 Initial Pulse Frequency Creep Pulse Frequency Output Pulse Q0 Pulse Output ON M10 Pulse Output Complete M11...
Page 356 20: P ULSE NSTRUCTIONS Sample Program: ZRN1 This program demonstrates a user program of the ZRN1 instruction used for zero-return operation to generate output pulses of 3 kHz initial pulse frequency from output Q0 while input I1 is on. When deceleration input I3 is turned on, the output pulse frequency reduces to the creep pulse frequency of 800 Hz.
Page 357: 21: Pid I
(S1+10) to execute an integral action within the proportional band. Applicable CPU modules and system program versions are shown in the table below. For the procedure to conﬁrm the system program version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C FC4A-C16R2C...
Page 358: Pid (Pid Control)
Applicable CPU Modules and Quantity of PID Instructions A maximum of 8 or 14 PID instructions can be used in a user program, depending on the CPU module type. FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 359 21: PID I NSTRUCTION Source Operand S1 (Control Register) Store appropriate values to data registers starting with the operand designated by S1 before executing the PID instruction as required, and make sure that the values are within the valid range. Operands S1+0 through S1+2 are for read only, and operands S1+23 through S1+26 are reserved for the system program.
Page 360 21: PID I NSTRUCTION S1+0 Process Variable (after conversion) When the linear conversion is enabled (S1+4 set to 1), the data register designated by S1+0 stores the linear conversion result of the process variable (S4). The process variable (S1+0) takes a value between the linear conversion minimum value (S1+6) and the linear conversion maximum value (S1+5).
Page 361 21: PID I NSTRUCTION S1+3 Operation Mode When the start input for the PID instruction is turned on, the CPU module checks the value stored in the data register des- ignated by S1+3 and executes the selected operation. The selection cannot be changed while executing the PID instruction. 0: PID action The PID action is executed according to the designated PID parameters such as proportional gain (S1+7), integral time (S1+8), derivative time (S1+9), and control action (S2+0).
Page 362 21: PID I NSTRUCTION Example: When type K thermocouple is connected, the analog input data ranges from 0 through 4095. To convert the analog input data to actual measured temperature values, set the following parameters. Linear conversion (S1+4): 1 (enable linear conversion) Linear conversion maximum value (S1+5): 1300 (1300°C) Linear conversion minimum value (S1+6):...
Page 363 21: PID I NSTRUCTION When the derivative time is set to a large value, the derivative action becomes large. When the derivative action is too large, hunching of a short period is caused. While the PID action is in progress, the derivative time value can be changed by the user. S1+10 Integral Start Coefﬁcient The integral start coefﬁcient is a parameter to determine the point, in percent of the proportional term, where to start the integral action.
Page 364 21: PID I NSTRUCTION Example – Sampling period: 80 ms, Scan time: 60 ms (Sampling period > Scan time) 1 scan 1 scan 1 scan 1 scan 1 scan 1 scan 1 scan 1 scan 60 ms 60 ms 60 ms 60 ms 60 ms 60 ms...
Page 365 21: PID I NSTRUCTION S1+16 Output Manipulated Variable Upper Limit The value contained in the data register designated by S1+16 speciﬁes the upper limit of the output manipulated variable (S1+1) in two ways: direct and proportional. S1+16 Value 0 through 100 When S1+16 contains a value 0 through 100, the value directly determines the upper limit of the output manipulated vari- able (S1+1).
Page 366 21: PID I NSTRUCTION Set the AT sampling period to a long value to make sure that the current process variable is smaller than or equal to the pre- vious process variable during direct control action (S2+0 is on) or that the current process variable is larger than or equal to the previous process variable during reverse control action (S2+0 is off).
Page 367 21: PID I NSTRUCTION Source Operand S2 (Control Relay) Turn on or off appropriate outputs or internal relays starting with the operand designated by S2 before executing the PID instruction as required. Operands S2+4 through S2+7 are for read only to reﬂect the PID and auto tuning statuses. Operand Function Description...
Page 368 21: PID I NSTRUCTION S2+2 Output Manipulated Variable Limit Enable The output manipulated variable upper limit (S1+16) and the output manipulated variable lower limit (S1+17) are enabled or disabled using the output manipulated variable limit enable control relay (S2+2). To enable the output manipulated variable upper/lower limits, turn on S2+2. To disable the output manipulated variable upper/lower limits, turn off S2+2.
Page 369 21: PID I NSTRUCTION Source Operand S4 (Process Variable before Conversion) The PID instruction is designed to use analog input data from an analog I/O module as process variable. The analog I/O module converts the input signal to a digital value of 0 through 4095, and stores the digital value to a data register depend- ing on the mounting position of the analog I/O module and the analog input channel connected to the analog input source.
Page 370: Application Example
21: PID I NSTRUCTION Application Example This application example demonstrates a PID control for a heater to keep the temperature at 200°C. In this example, when the program is started, the PID instruction ﬁrst executes auto tuning according to the designated AT parameters, such as AT sampling period, AT control period, AT set point, and AT output manipulated variable, and also the temperature data inputted to the analog input module.
Page 371 21: PID I NSTRUCTION System Setup FC4A-C24R2 FC4A-L03AP1 +24V DC IN DC OUT – Type K Thermocouple – 100-240VAC Ry.OUT Ry.OUT Ry.OUT Ry.OUT COM0 COM1 COM2 10 COM3 11 Heater Output Q1 High Alarm Light Fuse Output Q0 Analog Input Data vs. Process Variable after Conversion Process Variable after Conversion (S1+0) Linear Conversion Maximum Value (S1+5): 13000 (1300°C) High Alarm Value (S1+14): 2500 (250°C)
Page 372 21: PID I NSTRUCTION Ladder Program The ladder diagram shown below describes an example of using the PID instruction. The user program must be modiﬁed according to the application and simulation must be performed before actual operation. M8120 is the initialize pulse special internal relay. ANST NO.1 L03AP1...
Page 373 21: PID I NSTRUCTION Set PID Parameters (PIDST) Dialog Box Place the cursor where to insert the PIDST instruction, click the right mouse button, and select > Macro Instructions . In the PIDST dialog box, program as shown below. PIDST (Set PID Parameters) Select operands as with the PID instruction.
Page 374 21: PID I NSTRUCTION Notes for Using the PID Instruction: • Since the PID instruction requires continuous operation, keep on the start input for the PID instruction. • The high alarm output (S2+4) and the low alarm output (S2+5) work while the start input for the PID instruction is on. These alarm outputs, however, do not work when a PID instruction execution error occurs (S1+2 stores 100 through 107) due to data error in control data registers S1+0 through S1+26 or while the start input for the PID instruction is off.
Page 375: Teaching
DTMS and off for a duration designated by operands S1 and S2, ***** ***** ***** ***** respectively. The time range is 0 through 65.535 sec. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — — — « FC4A M ’...
Page 376 22: D EACHING IMER NSTRUCTIONS Valid Operands Operand Function Constant S1 (Source 1) ON duration — — — — — — 0-65535 S2 (Source 2) OFF duration — — — — — — 0-65535 ▲ D1 (Destination 1) Dual timer output —...
Page 377: Ttim (Teaching Timer)
While input is on, the ON duration is measured in units of 100 ms and the measured TTIM value is stored to a data register designated by destination operand D1. ***** The measured time range is 0 through 6553.5 sec. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 —...
Page 378 22: D EACHING IMER NSTRUCTIONS 22-4 « FC4A M ’ » ICRO MART ANUAL...
Page 379 Upgraded CPU modules can use the intelligent module access instructions. Applicable CPU modules and system program version are shown in the table below. For the procedure to conﬁrm the system program version of the CPU module, see page 29-1. All-in-One Type Slim Type FC4A-D20RK1 CPU Module FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 FC4A-C10R2C FC4A-C16R2C...
Page 380: 23: I Module Ai
***** ***** designated by SLOT and stored to the operand designated by DATA. BYTE designates the quantity of data to read. STATUS stores the operating status code. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — Valid Operands (Run Access Read)
Page 381: Runa Write (Run Access Write)
***** ***** ADDRESS in the intelligent module designated by SLOT. BYTE designates the quantity of data to write. STATUS stores the operating status code. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 & FC4A-D40K3/S3 — — Valid Operands (Run Access Write)
Page 382: Stpa Read (Stop Access Read)
Note: STPA READ and STPA WRITE instructions can be used 64 times in a user program. When more than 64 STPA READ and STPA WRITE instructions are used in a user program, the excess instructions are not executed and error code 7 is stored in the data register designated as STATUS. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 383: Stpa Write (Stop Access Write)
Note: STPA READ and STPA WRITE instructions can be used 64 times in a user program. When more than 64 STPA READ and STPA WRITE instructions are used in a user program, the excess instructions are not executed and error code 7 is stored in the data register designated as STATUS. Applicable CPU Modules FC4A-C10R2/C FC4A-C16R2/C FC4A-C24R2/C FC4A-D20K3/S3 FC4A-D20RK1/RS1 &...
Page 384 23: I NTELLIGENT ODULE CCESS NSTRUCTIONS Intelligent Module Access Status Code The data register designated as STATUS stores a status code to indicate the operating status and error of the intelligent module access operation. When status code 1, 3, or 7 is stored, take a corrective measure as described in the table below: Status Status Description...
Page 385 23: I NTELLIGENT ODULE CCESS NSTRUCTIONS Example: RUNA READ The following example illustrates the data movement of the RUNA READ instruction. The data movement of the STPA READ is the same as the RUNA READ instruction. While input I0 is on, data of 5 bytes is read from RUNA(W) DATA STATUS...
Page 386 23: I NTELLIGENT ODULE CCESS NSTRUCTIONS 23-8 « FC4A M ’ » ICRO MART ANUAL...
Page 387: I/O Control
CPU module system program versions as MicroSmart listed below. All-in-one 10- and 16-I/O type CPU modules cannot use either END refresh or ladder refresh type analog I/O modules. All-in-One Type Slim Type FC4A-D20RK1 FC4A MicroSmart FC4A-C10R2 FC4A-C16R2 FC4A-C24R2 FC4A-D20K3 FC4A-D20RS1 CPU Module FC4A-C10R2C FC4A-C16R2C...
Page 388: Programming Windldr
24: A I/O C NALOG ONTROL Programming WindLDR ver. 5.0 or later which has the ANST (Set Analog Module Parameters) macro for easy programming of ana- WindLDR log I/O modules. For a start input of the ANST macro, use special internal relay M8120 (initialize pulse) to execute the ANST macro only once after starting the CPU.
Page 389 24: A I/O C NALOG ONTROL 3. Click the Conﬁgure button under the selected slots. The Conﬁgure Parameters dialog box appears. All parameters for analog I/O control can be set in this dialog box. Avail- able parameters vary with the type of the analog I/O module. END Refresh Type Conﬁgure Parameters dialog box Analog I/O Data (Note) Analog I/O Operating Status...
Page 390 24: A I/O C NALOG ONTROL 5. Select a DR allocation number (Ladder refresh type only). CPU Module DR Allocation END Refresh Type FC4A-L03A1 DR allocation starts with D760 as default, and the ﬁrst DR number cannot be changed. FC4A-L03AP1 One analog I/O module occupies 20 data registers.
Page 391 24: A I/O C NALOG ONTROL 8. Select a data type for each channel. Click on the right of the Data Type ﬁeld, then a pull-down list appears to show all available input or output data types. 9. Select a scale value (Ladder refresh type analog input modules only). When Celsius or Fahrenheit is selected for thermocouple, resistance thermometer, or thermistor signal types on ladder refresh type analog input modules, the scale value can be selected from ×1, ×10, or ×100 depending on the selected signal type.
Page 392 24: A I/O C NALOG ONTROL 10. Select maximum and minimum values. For analog input values, when Optional range is selected for the Data Type, designate the analog input data minimum and maximum values which can be –32,768 through 32,767. In addition, when using resistance thermometers (Pt100, Pt1000, Ni100, or Ni1000) with the Celsius or Fahrenheit Data Type and the ×100 scale, select the analog input data minimum value from 0 or another value in the pull-down list.
Page 393: Analog I/O Control Parameters
24: A I/O C NALOG ONTROL Analog I/O Control Parameters Available parameters for analog I/O control depend on the type of analog I/O modules as summarized in the following table. Designate the parameters in the Conﬁgure Parameters dialog box of the ANST macro as required by your applica- tion.
Page 394: Data Register Allocation Numbers For Analog I/O Modules
24: A I/O C NALOG ONTROL Data Register Allocation Numbers for Analog I/O Modules Analog I/O modules are numbered from 1 through 7, in the order of increasing distance from the CPU module. Data regis- ters are allocated to each analog I/O module depending on the analog I/O module number. END refresh type analog I/O modules and ladder refresh type analog I/O modules have different data register allocation.
Page 395 24: A I/O C NALOG ONTROL Ladder Refresh Type Analog I/O Modules When using a ladder refresh type analog input or output module, the ﬁrst data register number can be designated in the ASNT macro dialog box. The quantity of required data registers depends on the model of the ladder refresh type analog input or output module.
Page 396 24: A I/O C NALOG ONTROL Ladder Refresh Type Analog Output Module Data Register Allocation (FC4A-K2C1) Data Register Data Size Parameter Channel Default Number Offset (word) +0 (Low Byte) Analog output signal type +0 (High Byte) — Reserved — All channels Analog output data conﬁguration Analog output signal type 00FFh...
Page 397: Analog Input Parameters
24: A I/O C NALOG ONTROL Analog Input Parameters Analog input parameters include the analog input signal type, analog input data type, analog input minimum and maxi- mum values, ﬁlter value, thermistor parameter, analog input data, and analog input operating status. This section describes these parameters in detail.
Page 398 24: A I/O C NALOG ONTROL Optional Range When Optional range is selected as an analog input data type, the analog input is linearly converted into digital data in the range between the minimum and maximum values designated in the Conﬁgure Parameters dialog box. Type No.
Page 399 24: A I/O C NALOG ONTROL Analog Input Minimum/Maximum Values For analog input values, when Optional range is selected for the Data Type, designate the analog input data minimum and maximum values which can be –32,768 through 32,767. In addition, when using resistance thermometers (Pt100, Pt1000, Ni100, or Ni1000) with the Celsius or Fahrenheit Data Type and the ×100 scale, select the analog input data minimum value from 0 or another value in the pull-down list.
Page 400 24: A I/O C NALOG ONTROL END Refresh Type The operating status of each analog input channel is stored to a data register, such as D761 or D767, allocated to analog input channel 1 or 2 on analog module number 1 through 7 depending on the mounting position. The analog input operating status data is updated whether the CPU module is running or stopped.
Page 401: Analog Output Parameters
24: A I/O C NALOG ONTROL Analog Output Parameters Analog output parameters include the analog output signal type, analog output data type, analog output minimum and maximum values, analog output data, and analog output operating status. This section describes these parameters in detail. Analog Output Signal Type A total of three analog output signal types are available, depending on the analog I/O or analog output module.
Page 402 24: A I/O C NALOG ONTROL Status Code Analog Output Operating Status (END refresh type) Normal operation (reserved) Initializing Invalid parameter or analog output channel not available on the installed analog module Hardware failure (external power supply failure) Ladder Refresh Type The operating status of each analog output channel is stored to a data register determined by the data register number selected in the Conﬁgure Parameters dialog box of the ANST macro.
Page 403 24: A I/O C NALOG ONTROL Example: Analog I/O The following example demonstrates a program of analog I/O control using an NTC thermistor. Two analog I/O modules are mounted in the slots shown below. System Setup Slim Type Analog Input Module Output Module CPU Module (Thermistor)
Page 404 24: A I/O C NALOG ONTROL Wiring Diagram FC4A-J8AT1 (Analog Input Module) Terminal No. Channel Fuse 24V DC – 24V DC — NTC Thermistor • Thermistor Speciﬁcations Type No. NT731ATTD103K38J (KOA) Type 10,000Ω 25°C B Parameter 3,800K FC4A-T08S1 (8-point Transistor Source Output Module) Terminal No.
Page 405 24: A I/O C NALOG ONTROL WindLDR Programming Analog I/O modules are programmed using the ANST macro in . Program the ANST macro as shown below. WindLDR • Analog Input Module FC4A-J8AT1 on Slot 1 DR Allocation Range Designation Description D630 - D694 D630 Optional range allocation, 65 words...
Page 406 24: A I/O C NALOG ONTROL • Analog Output Module FC4A-K1A1 on Slot 3 DR Allocation Range Designation Description D760 - D779 — Automatic range allocation, 20 words Channel Item Designation Description Signal Type 0 to 10V DC Voltage output Data Type Binary data 0 to 4095...
Page 407 24: A I/O C NALOG ONTROL Changing Analog Output While CPU is Stopped When using the FC4A-K2C1 analog output module, the analog output value can be changed while the CPU module is stopped. To change the analog output value, store a required output value to the memory addresses allocated to the analog output data.
Page 408 24: A I/O C NALOG ONTROL 24-22 « FC4A M ’ » ICRO MART ANUAL...
Page 409 25: D OMMUNICATION Introduction This chapter describes the data link communication function used to set up a distributed control system. A data link communication system consists of one master station and a maximum of 31 slave stations, each station com- prising a 16- or 24-I/O type CPU module or any slim type CPU module.
Page 410: 25: D Lc
25: D OMMUNICATION Data Link System Setup To set up a data link system, install the RS485 communication adapter (FC4A-PC3) to the port 2 connector on the all-in- one 16- or 24-I/O type CPU module. When using the slim type CPU module, mount the RS485 communication module (FC4A-HPC3) next to the CPU module. When using the optional HMI module with the slim type CPU module (not shown below), install the RS485 communica- tion adapter (FC4A-PC3) to the port 2 connector on the HMI base module.
Page 411: Data Register Allocation For Transmit/Receive Data
25: D OMMUNICATION Data Register Allocation for Transmit/Receive Data The master station has 12 data registers assigned for data communication with each slave station. Each slave station has 12 data registers assigned for data communication with the master station. When data is set in data registers at the master sta- tion assigned for data link communication, the data is sent to the corresponding data registers at a slave station.
Page 412: Special Data Registers For Data Link Communication Error
25: D OMMUNICATION Special Data Registers for Data Link Communication Error In addition to data registers assigned for data communication, the master station has 31 special data registers and each slave station has one special data register to store data link communication error codes. If any communication error occurs in the data link system, communication error codes are set to a corresponding data register for link communication error at the master station and to data register D8069 at the slave station.
Page 413: Data Link Communication Between Master And Slave Stations
25: D OMMUNICATION Data Link Communication between Master and Slave Stations The master station has 6 data registers assigned to transmit data to a slave station and 6 data registers assigned to receive data from a slave station. The quantity of data registers for data link can be selected from 0 through 6 using .
Page 414: Special Internal Relays For Data Link Communication
25: D OMMUNICATION Special Internal Relays for Data Link Communication Special internal relays M8005 through M8007 and M8080 through M8117 are assigned for the data link communication. M8005 Data Link Communication Error When an error occurs during communication in the data link system, M8005 turns on. The M8005 status is maintained when the error is cleared and remains on until M8005 is reset using or until the CPU is turned off.
Page 415: Programming Windldr
25: D OMMUNICATION Programming WindLDR The Communication page in the Function Area Settings is used to program for the data link master and slave stations. Since these settings relate to the user program, the user program must be downloaded to the after changing MicroSmart any of these settings.
Page 416 25: D OMMUNICATION Data Link Slave Station 1. From the WindLDR menu bar, select Conﬁgure > Function Area Settings. The Function Area Setting dialog box appears. 2. Click the Communication tab, and select Data Link Slave in the Port 2 pull-down list. 3.
Page 417: Refresh Mode
25: D OMMUNICATION Refresh Mode In the data link communication, the master station sends data to a slave station and receives data from the slave station one after another. After receiving data from slave stations, the master station stores the data into data registers allocated to each slave station.
Page 418 25: D OMMUNICATION The communication sequence in the separate refresh mode is shown below: 1 scan time END Processed Master Station Slave 1 Slave 2 Slave 3 Slave 31 Slave 1 Refresh Refresh Refresh Refresh Refresh Slave 1 Comm. Completion M8080 Master Slave 2 Comm.
Page 419: Operating Procedure For Data Link System
25: D OMMUNICATION Operating Procedure for Data Link System To set up and use a data link system, complete the following steps: 1. Connect the CPU modules at the master station and all slave stations as illustrated on page 25-2. MicroSmart 2.
Page 420: Data Link With Other Plcs
25: D OMMUNICATION Data Link with Other PLCs The data link communication system can include IDEC’s micro programmable OpenNet Controller MICRO MICRO controllers, and FA-3S programmable controllers using serial interface modules. Data Link with OpenNet Controller OpenNet Controller Settings MicroSmart Settings...
Page 421: Link Communication
26: C OMPUTER OMMUNICATION Introduction When the CPU module is connected to a computer, operating status and I/O status can be monitored on the MicroSmart computer, data in the CPU module can be monitored or updated, and user programs can be downloaded and uploaded. The CPU module can also be started and stopped from the computer.
Page 422: Programming Windldr
26: C OMPUTER OMMUNICATION Programming WindLDR In the 1:1 computer link system, a computer can be connected to either port 1 or 2 on the CPU module. In the MicroSmart 1:N computer link system, a computer must be connected to port 2 on the CPU module and every CPU module must have a unique device number 0 through 31.
Page 423: Monitoring Plc Status
26: C OMPUTER OMMUNICATION Assigning Device Numbers When assigning a unique device number of 0 through 31 to each CPU module for the 1:N computer link network, down- load the user program containing the device number setting to each CPU module in the 1:1 computer link system, then the new device number is assigned to the CPU module.
Page 424: Rs232C/Rs485 Converter Fc2A-Md1
26: C OMPUTER OMMUNICATION RS232C/RS485 Converter FC2A-MD1 The RS232C/RS485 converter FC2A-MD1 is used to convert data signals between EIA RS232C and EIA RS485. This converter makes it possible to connect a host device with RS232C interface to multiple CPU modules using MicroSmart one cable.
Page 425 26: C OMPUTER OMMUNICATION RS232C Connector Pinouts Pin No. Description D-sub 25-pin Female Connector Frame Ground Transmit Data Receive Data (RTS) Unused (CTS) Unused (NC) Unused Note: Terminals 4 and 5 are connected together internally. Signal Ground 8-25 (NC) Unused Dimensions Mounting Bracket Mounting Hole Layout...
Page 426 26: C OMPUTER OMMUNICATION 26-6 « FC4A M ’ » ICRO MART ANUAL...
Page 427: Mode
27: M ODEM Introduction This chapter describes the modem mode designed for communication between the and another MicroSmart MicroSmart any data terminal equipment through telephone lines. Using the modem mode, the can initialize a modem, MicroSmart dial a telephone number, send an AT command, enable the answer mode to wait for an incoming call, and disconnect the telephone line.
Page 428: Applicable Modems
27: M ODEM Applicable Modems Any Hayes compatible modem can be used. Modems with a communications rate of 9600 bps or more between modems are recommended. Use modems of the same make and model at both ends of the communication line. Special Internal Relays for Modem Mode Special internal relays M8050-M8077 are allocated to the modem mode.
Page 429: Special Data Registers For Modem Mode
27: M ODEM Special Data Registers for Modem Mode Special data registers D8103 and D8109-D8199 are allocated to the modem mode. When the starts to run, MicroSmart D8109 and D8110 store the default values, and D8145-D8169 store the default initialization string. Data Register Stored Data Description...
Page 430 27: M ODEM AT and are appended at the beginning and end of the initialization string automatically by the system program and are not stored in data registers. 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159...
Page 431: Disconnect Mode
27: M ODEM As described above, when start internal relay M8050 is turned on, the initialization string is sent, followed by the ATZ command and the dial command. When start internal relay M8051 is turned on, the ATZ command is sent, followed by the dial command.
Page 432: Answer Mode
27: M ODEM Example of AT Command: ATE0Q0V1 CR LF AT and are appended at the beginning and end of the AT general command string automatically by the system program and need not be stored in data registers. To program the AT command string of the example above, store the command characters and ASCII value 0Dh for to data registers starting with D8130.
Page 433: Modem Mode Status Data Register
27: M ODEM Modem Mode Status Data Register When the modem mode is enabled, data register D8111 stores a modem mode status or error code. D8111 Value Status Description Not in the modem mode Modem mode is not enabled. Start internal relays except for disconnecting line can Ready for connecting line be turned on.
Page 434: Initialization String Commands
27: M ODEM Initialization String Commands The built-in initialization string (see page 27-3) include the commands shown below. For details of modem commands, see the user’s manual for your modem. When you make an optional initialization string, modify the initialization string to match your modem.
Page 435: Preparation For Using Modem
27: M ODEM Preparation for Using Modem Before using a modem, read the user’s manual for your modem. The required initialization string depends on the model and make of the modem. When the starts to run the MicroSmart user program, the default modem initialization strings is stored to D8145-D8169. See page 27-3. Default Initialization String: ATE0Q0V1&D2&C1\V0X4&K3\A0\N5S0=2&W CR LF...
Page 436: Programming Windldr
27: M ODEM Programming WindLDR The Communication page in the Function Area Settings must be programmed to enable the modem communication for port 2. If required, communication parameters of the CPU module port 2 can also be changed. Since these settings relate to the user program, the user program must be downloaded to the after changing MicroSmart any of these settings.
Page 437: Operating Procedure For Modem Mode
27: M ODEM Operating Procedure for Modem Mode 1. After completing the user program including the Function Area Settings, download the user program to the Micro- from a computer running Smart WindLDR 2. Start the to run the user program. MicroSmart 3.
Page 438: Sample Program For Modem Originate Mode
27: M ODEM Sample Program for Modem Originate Mode This program demonstrates a user program for the modem originate mode to move values to data registers assigned to the modem mode, initialize the modem, dial the telephone number, and disconnect the telephone line. While the telephone line is connected, user communication instruction TXD2 sends a character string “Connect.”...
Page 439: Sample Program For Modem Answer Mode
27: M ODEM Sample Program for Modem Answer Mode This program demonstrates a user program for the modem answer mode to move a value to a data register assigned to the modem mode and initialize the modem. While the telephone line is connected, user communication instruction RXD2 is executed to receive an incoming communication.
Page 440: Troubleshooting In Modem Communication
27: M ODEM Troubleshooting in Modem Communication When a start internal relay is turned on, the data of D8111 (modem mode status) changes, but the modem does not work. Cause: A wrong cable is used or wiring is incorrect. Solution: Use the modem cable 1C (FC2A-KM1C). The DTR or ER indicator on the modem does not turn on.
Page 441: Master Communication
28: AS-I NTERFACE ASTER OMMUNICATION Introduction This chapter describes general information about the Actuator-Sensor-Interface, abbreviated AS-Interface, and detailed information about using the AS-Interface master module. About AS-Interface AS-Interface is a type of ﬁeld bus that is primarily intended to be used to control sensors and actuators. AS-Interface is a network system that is compatible with the IEC62026 standard and is not proprietary to any one manufacturer.
Page 442 28: AS-I NTERFACE ASTER OMMUNICATION AS-Interface System Requirements Master The AS-Interface master controls and monitors the status of slave devices connected to the AS-Interface bus. Normally, the AS-Interface master is connected to a PLC (sometimes called ‘host’) or a gateway. For example, the Micro- AS-Interface master module is connected to the CPU module.
Page 443 AS-Interface Marks • Use a VLSV (very low safety voltage) to power the AS-Interface bus. Caution The normal output voltage of the AS-Interface power supply is 30V DC. Recommended IDEC AS-Interface Power Supplies Input Voltage Output Voltage Output Wattage Type No.
Page 444 28: AS-I NTERFACE ASTER OMMUNICATION Main Features of AS-Interface V2 with Slave Expansion Capability The AS-Interface is a reliable bus management system in which one master periodically monitors each slave device con- nected on the AS-Interface bus in sequence. The master manages the I/O data, parameters, and identiﬁcation codes of each slave in addition to slave addresses.
Page 445 28: AS-I NTERFACE ASTER OMMUNICATION Quantities of Slaves and I/O Points The quantity of slaves that can be connected to one AS-Interface master module is as follows. • Standard slaves: 31 maximum • A/B slaves: 62 maximum The limits for slave quantities given above apply when the slaves are either all standard slaves or are all A/B slaves. When 62 A/B slaves (with four inputs and three outputs) are connected, a maximum of 434 I/O points (248 inputs and 186 outputs) can be controlled by one AS-Interface master module.
Page 446: Operation Basics
28: AS-I NTERFACE ASTER OMMUNICATION Operation Basics This section describes simple operating procedures for the basic AS-Interface system from programming on a WindLDR computer to monitoring the slave operation. AS-Interface System Setup The sample AS-Interface system consists of the following devices: Name Type No.
Page 447 28: AS-I NTERFACE ASTER OMMUNICATION Power Supply • When turning off the power to the CPU module, also turn off the AS-Interface power supply. If the Caution CPU module is powered down and up while the AS-Interface power remains on, AS-Interface com- munication may stop due to a conﬁguration error, resulting in a communication error.
Page 448 28: AS-I NTERFACE ASTER OMMUNICATION Selecting the PLC Type Start WindLDR on a computer. 1. From the WindLDR menu bar, select Conﬁgure > PLC Selection. The PLC Selection dialog box appears. 2. Select FC4A-D20R. 3. Click OK to save changes and return to the ladder editing screen. Function Area Settings Use of the AS-Interface master module must be selected in the Function Area Settings dialog box.
Page 449 28: AS-I NTERFACE ASTER OMMUNICATION Assigning a Slave Address AS-Interface compatible slave devices are set to address 0 at factory. Connect the slave to the AS-Interface master module as shown on page 28-6. Do not connect two or more slaves with slave address 0, otherwise the AS-Interface master module cannot recognize slave addresses correctly.
Page 450 28: AS-I NTERFACE ASTER OMMUNICATION Conﬁguring a Slave Next, you have to set the slave conﬁguration in the AS-Interface master module, either by using pushbuttons PB1 and PB2 on the AS-Interface master module or WindLDR Conﬁguration Using Pushbuttons PB1 and PB2 Shut down and power up again.
Page 451 28: AS-I NTERFACE ASTER OMMUNICATION Conﬁguration Using WindLDR Slave conﬁguration can be set using in two ways; using the button WindLDR Auto Conﬁguration Manual Conﬁguration on the Conﬁgure AS-Interface Master dialog box. 1. Click the Auto Conﬁguration button to store the conﬁguration information (LDS, CDI, PI) of the connected slaves to the EEPROM (LPS, PCD, PP) in the AS-Interface master module.
Page 452 28: AS-I NTERFACE ASTER OMMUNICATION Monitoring Digital I/O, and Changing Output Status and Parameters While the MicroSmart is communicating with AS-Interface slaves through the AS-Interface bus, operating status of AS- Interface slaves can be monitored using on a computer. Output statuses and parameter image (PI) of slaves con- WindLDR nected to the AS-Interface master module can also be changed using WindLDR...
Page 453 28: AS-I NTERFACE ASTER OMMUNICATION Troubles at System Start-up The following table summarizes possible troubles at system start-up, probable causes and actions to be taken. Trouble Cause and Action • AS-Interface power is not supplied to the AS-Interface master module. Check that wiring is correct and AS-Interface power is supplied.
Page 454: Pushbuttons And Led Indicators
28: AS-I NTERFACE ASTER OMMUNICATION Pushbuttons and LED Indicators This section describes the operation of pushbuttons PB1 and PB2 on the AS-Interface master module to change operation modes, and also explains the functions of address and I/O LED indicators. Pushbutton Operation The operations performed by pushbuttons PB1 and PB2 on the front of the AS-Interface master module depend on the duration of being pressed.
Page 455 28: AS-I NTERFACE ASTER OMMUNICATION AS-Interface Master Module Operation Modes The AS-Interface master module has two modes of operation: connected mode is used for actual operation, and local mode is used for maintenance purposes. Connected Mode In connected mode, the CPU module communicates with the AS-Interface master module to monitor and control each slave.
Page 456 28: AS-I NTERFACE ASTER OMMUNICATION LED Indicators The LED indicators on the AS-Interface master module consist of status LEDs, I/O LEDs, and address LEDs. Address LEDs (0x to 3x) Status LEDs Address LEDs (x0 to x9) Input LEDs Output LEDs Address LEDs (A and B) LED Indicators Description...
Page 457 28: AS-I NTERFACE ASTER OMMUNICATION Status LEDs The operation modes of the AS-Interface master module can be changed by pressing the pushbuttons on the front of the AS-Interface master module or by executing ASI commands. The operation modes can be conﬁrmed on the six status LEDs on the AS-Interface master module.
Page 458: As-Interface Operands
28: AS-I NTERFACE ASTER OMMUNICATION AS-Interface Operands This chapter describes AS-Interface operands, or internal relays M1300 through M1997 and data registers D1700 through D1999, assigned in the CPU module to control and monitor the AS-Interface bus, and provides detailed description about internal relays allocated to SwitchNet™...
Page 459 28: AS-I NTERFACE ASTER OMMUNICATION I/O Data for AS-Interface Master Module The AS-Interface master module can process digital I/O data and analog I/O data. Digital I/O data can be a maximum of 4 digital inputs and 4 digital outputs per slave. Analog I/O data consists of 4 channels of 16-bit analog input or output data per slave.
Page 460 28: AS-I NTERFACE ASTER OMMUNICATION • Digital Output Data Image Data Format Output Data Image (ODI) (DO3) (DO2) (DO1) (DO0) (DO3) (DO2) (DO1) (DO0) M1620 Byte 0 Slave 1(A) (Slave 0) M1630 Byte 1 Slave 3(A) Slave 2(A) M1640 Byte 2 Slave 5(A) Slave 4(A) M1650...
Page 461 28: AS-I NTERFACE ASTER OMMUNICATION Analog I/O Data of Analog Slaves The I/O data for a maximum of seven analog slaves (four channels for each slave) on the AS-Interface bus is stored to AS- Interface data registers in the CPU module. The analog slave addresses (1 to 31) are in the ascending order. The input data for each analog slave is allocated to data registers D1700 to D1731, and the output data is allocated to D1732 to D1763.
Page 462 28: AS-I NTERFACE ASTER OMMUNICATION • Analog Output Data Analog Output Channel No. Data Format D1732 Bytes 0 and 1 Channel 1 D1733 Bytes 2 and 3 Channel 2 1st data (AO0) D1734 Bytes 4 and 5 Channel 3 D1735 Bytes 6 and 7 Channel 4 D1736...
Page 463 28: AS-I NTERFACE ASTER OMMUNICATION Status Information The status information is allocated to AS-Interface internal relays M1940 through M1997. These internal relays are used to monitor the status of the AS-Interface bus. If an error occurs on the bus, you can also conﬁrm the error with the status LEDs on the front of the AS-Interface master module in addition to these status internal relays.
Page 464 28: AS-I NTERFACE ASTER OMMUNICATION M1943 Auto_Address_Available M1943 indicates whether or not the conditions for the auto addressing function are satisﬁed. M1943 goes on when the auto addressing function is enabled and there is one faulty slave (a slave which cannot be recognized by the AS-Interface mas- ter module) on the AS-Interface bus.
Page 465 28: AS-I NTERFACE ASTER OMMUNICATION Slave List Information Data registers D1764 through D1779 are assigned to slave list information to determine the operating status of the slaves. The slave list information is grouped into four lists. List of active slaves (LAS) shows the slaves currently in operation. List of detected slaves (LDS) the slaves detected on the AS-Interface bus.
Page 466 28: AS-I NTERFACE ASTER OMMUNICATION Slave Identiﬁcation Information (Slave Proﬁle) Data registers D1780 through D1940 are assigned to the slave identiﬁcation information, or the slave proﬁle. The slave proﬁle includes conﬁguration data and parameters to indicate the slave type and slave operation, respectively. Conﬁguration Data Image (CDI) Data registers D1780 through D1843 are allocated to read the CDI of each slave.
Page 467 28: AS-I NTERFACE ASTER OMMUNICATION Parameter Image (PI) Data registers D1908 through D1923 are allocated to read the PI of each slave. The PI is made up of four parameters: the P3, P2, P1, and P0. The PI is the current slave parameter data collected by the AS-Interface master module at power-up and stored in the AS-Interface master module.
Page 468 28: AS-I NTERFACE ASTER OMMUNICATION ASI Commands The ASI commands are used to update AS-Interface operands in the CPU module or to control the AS-Interface master module. Data registers D1941 through D1944 are used to store command data. D1945 is used to store a request code before executing the command.
Page 469 28: AS-I NTERFACE ASTER OMMUNICATION Request and Result Codes D1945 Value Low Byte Description Note Initial value at power up Request Processing ASI command While D1945 lower byte stores 01h, 02h, or 08h, Completed normally do not write any value to D1945, otherwise the ASI command is not executed correctly.
Page 470: Using Windldr
28: AS-I NTERFACE ASTER OMMUNICATION Using WindLDR This section describes the procedures to use for the AS-Interface system. contains the Conﬁgure AS- WindLDR WindLDR Interface Master dialog box to conﬁgure slaves and to change slave addresses, and the Monitor AS-Interface Slave dialog box to monitor the slave operation.
Page 471 28: AS-I NTERFACE ASTER OMMUNICATION Slave Address Shading Colors Operating status of the slave can be conﬁrmed by viewing the shading color at the slave address on the Conﬁgure AS- Interface Master dialog box. The screen display can be updated by clicking the button.
Page 472 28: AS-I NTERFACE ASTER OMMUNICATION Conﬁguration Before commissioning the AS-Interface master module, conﬁguration must be done using either WindLDR or the pushbut- tons on the front of the AS-Interface master module. This section describes the method of conﬁguration using WindLDR For conﬁguration using the pushbuttons, see page 28-10.
Page 473 28: AS-I NTERFACE ASTER OMMUNICATION Monitor AS-Interface Slave While the MicroSmart is communicating with AS-Interface slaves through the AS-Interface bus, operating status of AS- Interface slaves can be monitored using on a computer. Output statuses and parameter image (PI) can also be WindLDR changed using WindLDR...
Page 474 28: AS-I NTERFACE ASTER OMMUNICATION Error Messages When an error is returned from the AS-Interface master module, WindLDR will display an error message. The error codes and their meanings are given below. Error Code Description • An error was found on the expansion I/O bus. •...
Page 475: Switchnet Data I/O Port (As-Interface Master Module 1)
28: AS-I NTERFACE ASTER OMMUNICATION SwitchNet Data I/O Port SwitchNet control units can be used as slaves in the AS-Interface network and are available in ø16mm L6 series and ø22mm HW series. Input signals to the AS-Interface master module are read to internal relays allocated to MicroSmart each input point designated by a slave number and a DI number.
Page 476 28: AS-I NTERFACE ASTER OMMUNICATION HW Series Digital I/O Data Allocation Input data is sent from slaves to the AS-Interface master. Output data is sent from the AS-Interface master to slaves. Input Data Output Data Communication SwitchNet HW Series (slave send data) (slave receive data) Used I/O Block Mounting...
Page 477 28: AS-I NTERFACE ASTER OMMUNICATION • Internal Relays for SwitchNet Slaves L6 Series Selector, Key selector, Pushbutton Pilot Light Illuminated Pushbutton Lever: 2-position Slave Number Input DI2 Output DO0 Input DI2 Output DO0 Input DI2 (Slave 0) M1302 M1620 M1302 M1620 M1302 Slave 1(A)
Page 478 28: AS-I NTERFACE ASTER OMMUNICATION L6 Series (continued) Selector, Key selector, Lever: Illuminated selector: 2-position Illuminated selector: 3-position 3-position Slave Number Input DI3 Input DI2 Input DI2 Output DO0 Input DI3 Input DI2 Output DO0 (Slave 0) M1303 M1302 M1302 M1620 M1303 M1302...
Page 479 28: AS-I NTERFACE ASTER OMMUNICATION HW Series Selector, Key selector: Pushbutton Pilot Light Illuminated Pushbutton 2-position Slave Number Input DI2 Output DO0 Input DI2 Output DO0 Input DI2 (Slave 0) M1302 M1620 M1302 M1620 M1302 Slave 1(A) M1306 M1624 M1306 M1624 M1306 Slave 2(A)
Page 480 28: AS-I NTERFACE ASTER OMMUNICATION HW Series (continued) Selector, Key selector: Illuminated selector: 2-position Illuminated selector: 3-position 3-position Slave Number Input DI2 (Comm. Block ➀ ➁) Input DI2 (Comm. Block ➀ ➁) Output DO0 (Comm. Block ➁) Input DI2 Output DO0 (Slave 0) M1302 M1302...
Page 481: Troubleshooting
29: T ROUBLESHOOTING Introduction This chapter describes the procedures to determine the cause of trouble and actions to be taken when any trouble occurs while operating the MicroSmart has self-diagnostic functions to prevent the spread of troubles if any trouble should occur. In case of any MicroSmart trouble, follow the troubleshooting procedures to determine the cause and to correct the error.
Page 482 29: T ROUBLESHOOTING 3. Under the Error Status in the PLC Status dialog box, click the Details button. The PLC Error Status screen appears. Clearing Error Codes from WindLDR After removing the cause of the error, clear the error code using the following procedure: 1.
Page 483: Special Data Registers For Error Information
29: T ROUBLESHOOTING Special Data Registers for Error Information Two data registers are assigned to store information on errors. D8005 General Error Code D8006 User Program Execution Error Code General Error Codes The general error code is stored to special data register D8005 (general error code). When monitoring the PLC status using WindLDR , the error code is displayed in the error code box under the Error Status in...
Page 484: Cpu Module Operating Status, Output, And Err Led During Errors
29: T ROUBLESHOOTING CPU Module Operating Status, Output, and ERR LED during Errors Operating Error Items Output ERR LED Checked at Status Power failure Stop Any time Watchdog timer error Stop Any time Data link connection error Stop Initializing data link User program EEPROM sum check error Stop Starting operation...
Page 485 29: T ROUBLESHOOTING 0020h: User Program RAM Sum Check Error The data of the user program compile area in the CPU module RAM is broken.When this error occurs, the MicroSmart user program is recompiled automatically, and the timer/counter preset values and expansion data register preset values are initialized to the values of the user program.
Page 486: User Program Execution Error
29: T ROUBLESHOOTING User Program Execution Error This error indicates that invalid data is found during execution of a user program. When this error occurs, the ERR LED and special internal relay M8004 (user program execution error) are also turned on. The detailed information of this error can be viewed from the error code stored in special data register D8006 (user program execution error code).
Page 487: Troubleshooting Diagrams
29: T ROUBLESHOOTING Troubleshooting Diagrams When one of the following problems is encountered, see the trouble shooting diagrams on the following pages. Troubleshooting Problem Diagram The PWR LED does not go on. Diagram 1 The RUN LED does not go on. Diagram 2 The ERR LED is on.
Page 488 Is the PWR LED on? Supply the rated voltage. Is the power voltage All-in-one type: 100-240V AC correct? 24V DC Slim type: 24V DC Is the PWR LED on? Call IDEC for assistance. 29-8 « FC4A M ’ » ICRO MART ANUAL...
Page 489 Turn on M8000 using WindLDR. Is stop or reset input designated using Function Is the RUN LED on? Area Settings? Turn off the stop and reset inputs. Is the RUN LED on? Call IDEC for assistance. « FC4A M ’ » 29-9 ICRO MART...
Page 490 29: T ROUBLESHOOTING Troubleshooting Diagram 3 The ERR LED is on. Clear error codes using WindLDR. See Note below. Is the ERR LED turned off? See page 29-3. Identify the error code and correct the error. Note: Temporary errors can be cleared to restore normal operation by clearing error codes from WindLDR.
Page 491 Slim type CPU modules: 20.4 to 26.4V DC AC input module: 85 to 132V AC Are wiring and Correct the external operation of external device wiring. devices correct? Call IDEC for assistance. « FC4A M ’ » 29-11 ICRO MART ANUAL...
Page 492 Monitor the output using WindLDR. The output circuit in the CPU or Does the monitored output module is damaged. output turn on and Replace the module. off? Call IDEC for assistance. 29-12 « FC4A M ’ » ICRO MART ANUAL...
Page 493 Correct the Communication Set- Communication Settings tings using WindLDR. See page correct? 26-3. Call IDEC for assistance. When only program download is not possible: Only program download is not possible. Disable the user program protection. Is “Protect User Program” For details, see page 5-25.
Page 494 Replace the CPU module. Is M8000 off? Turn off the start control special Call IDEC for assistance. internal relay M8000 using WindLDR on a computer. Note: To turn off M8000, from the WindLDR menu bar, select Online >...
Page 495 Turn off the power to the master station, and 25-11) or turn on M8007 during turn on the power after a few seconds. operation using WindLDR. Are error codes cleared to 0 at all stations? Call IDEC for assistance. « FC4A M ’ » 29-15 ICRO MART...
Page 496 Is the input to the Turn on the input to the TXD instruction. TXD instruction on? See Troubleshooting Diagram 1 Is the PWR LED on? “The PWR LED does not go on.” Call IDEC for assistance. 29-16 « FC4A M ’ » ICRO...
Page 497 1 operand of the nated as source 1 operand is correct. TXD instruction? Call IDEC for assistance. When the user communication still has a problem after completing the above procedure, also perform the procedure of Diagram 9 described on the preceding page.
Page 498 Is the input to the Turn on the input to the RXD instruction. RXD instruction on? See Troubleshooting Diagram 1 Is the PWR LED on? “The PWR LED does not go on.” Call IDEC for assistance. 29-18 « FC4A M ’ » ICRO...
Page 499 WindLDR? Did you make Make sure that the receive data sure of source 1 operand of the designated as the source 1 oper- RXD instruction? and is correct. Call IDEC for assistance. « FC4A M ’ » 29-19 ICRO MART...
Page 500 The interrupt/catch input cannot receive short pulses. Make sure of correct input voltage. Are the input ON/OFF ON voltage: 15V DC minimum voltage levels correct? OFF voltage: 5V DC maximum Call IDEC for assistance. 29-20 « FC4A M ’ » ICRO MART...
Page 501 The clock data is broken. Set the calendar/ error” displayed? clock using WindLDR (see page 15-5). Monitor the PLC status using WindLDR. Is the calendar/clock operating normally? Call IDEC for assistance. « FC4A M ’ » 29-21 ICRO MART ANUAL...
Page 502: Restriction On Ladder Programming
29: T ROUBLESHOOTING Restriction on Ladder Programming • When using ver. 4.4 or earlier, the restriction on ladder programming may cause an WindLDR Caution unexpected operation and possible danger. • WindLDR ver. 4.5 or later prevents conversion of prohibited ladder program, making sure of safety. Due to the structure of , the following ladder diagram cannot be programmed —...
Page 503: Ppendix
PPENDIX Execution Times for Instructions Execution times for main instructions of the are listed below: MicroSmart Instruction Operand and Condition Execution Time (µs) Note LOD, LODN OUT, OUTN SET, RST AND, ANDN, OR, ORN AND LOD, OR LOD BRD, BPP TML, TIM, TMH, TMS CDP, CUD CC=, CC≥, DC=, DC≥...
Page 504: Breakdown Of End Processing Time
PPENDIX Instruction Operand and Condition Execution Time (µs) Note D → D BTOA D → D ATOB M → D 16 bits ENCO D → M DECO M → D 16 bits BCNT LJMP LCAL LRET IOREF RUNA, STPA 100-byte access 10 ms Note: Operands M, D, I, and Q represent internal relay, data register, input, and output, respectively.
Page 505: Instruction Steps And Applicability In Interrupt Programs
PPENDIX Instruction Steps and Applicability in Interrupt Programs The steps and bytes of basic and advanced instructions are listed below. Applicability of advanced instructions in interrupt programs are also shown in the rightmost column. Qty of Qty of Basic Instruction Advanced Instruction Qty of Steps Qty of Bytes...
Page 506: Cables
PPENDIX Cables Communication cables and their connector pinouts are described in this section. Modem Cable 1C (FC2A-KM1C) Cable Length: 3m (9.84 feet) To Modem RS232C Port To MicroSmart Port 2 Mini DIN Connector Pinouts D-sub 25-pin Male Connector Pinouts Description Description Shield Cover...
Page 507 PPENDIX User Communication Cable 1C (FC2A-KP1C) Cable Length: 2.4m (7.87 feet) To MicroSmart RS232C Port 1 or 2 To RS232C Port Attach a proper connector to the open end referring to the cable connector pinouts shown below. Mini DIN Connector Pinouts Signal Direction Port 1 Port 2...
Page 508 PPENDIX O/I Communication Cable 2C (FC4A-KC2C) Cable Length: 5m (16.4 feet) To HG2F To MicroSmart RS232C Port 1 or 2 Mini DIN Connector Pinouts D-sub 25-pin Male Connector Pinouts Description Description No Connection Frame Ground No Connection Transmit Data Transmit Data Receive Data Receive Data Request to Send...
Page 509: Type List
CPU Modules (All-in-One Type) Power Voltage Input Type Output Type I/O Points Type No. 10-I/O Type (6 in / 4 out) FC4A-C10R2 100-240V AC 16-I/O Type (9 in / 7 out) FC4A-C16R2 50/60 Hz 24-I/O Type (14 in / 10 out) FC4A-C24R2...
Page 510 PPENDIX Mixed I/O Modules Input Type Output Type I/O Points Terminal Type No. 8 (4 in / 4 out) Removable Terminal Block FC4A-M08BR1 Relay Output 24V DC Sink/Source 240V AC/30V DC, 2A 24 (16 in / 8 out) Non-removable Terminal Block FC4A-M24BR2 Analog I/O Modules Name...
Page 511 PPENDIX Accessories Name Function Type No. Used for interface between a computer and the MicroSmart CPU RS232C/RS485 Converter modules in the computer link 1:N communication system or FC2A-MD1 through modems RS232C Cable (4-wire) Used to connect the RS232C/RS485 converter to a computer, HD9Z-C52 (1.5m/4.92 ft.
Page 512 FC4A-KC1C (5m/16.4 ft. long) face to MicroSmart RS232C port 1 or 2 O/I Communication Cable 2C RS232C cable used to connect IDEC HG2F operator interface to FC4A-KC2C (5m/16.4 ft. long) MicroSmart RS232C port 1 or 2 Analog Voltage Input Cable...
Page 513 NDEX CVYTX 19-3 1:1 computer link data types 1:N computer link 26-1 DECO 14-12 100-ms DGRD 16-3 clock M8122 6-12 18-7 dual timer 22-1 DISP 16-1 10-ms 11-1 clock M8123 6-12 DTIM 22-1 dual timer 22-1 DTMH 22-1 1-ms dual timer 22-1 DTML 22-1...
Page 514 NDEX XYFS power supply 19-1 28-3 ZRN1 standard cable 20-24 28-3 ZRN2 system setup 20-24 28-6 all outputs OFF M8002 assembling modules 6-10 allocation numbers assigning a slave address 28-18 28-9 14-14 21-10 alternate output command 14-14 analog execution 27-2 result code 27-3 control...
Page 515 NDEX read prohibit flag M8015 mode information D8026 6-11 6-17 write flag M8020 modules 6-11 2-61 write/adjust error flag M8013 parameters 6-11 17-5 17-33 17-34 26-2 27-10 setting using settings 26-3 a user program 15-5 17-5 25-7 25-8 26-2 27-10 WindLDR compare 15-5...
Page 516 NDEX dual-pulse reversible input module 7-11 2-24 high-speed mixed I/O module 2-40 keep designation DC= and DC≥ instructions 7-16 up/down selection reversible deceleration input 7-12 20-26 CPU module decimal values and hexadecimal storage 30-7 error DECO 29-5 14-12 specifications decode 2-14 14-12 terminal arrangement...
Page 517 NDEX DTML 22-1 general DTMS 22-1 error codes 29-3 information control signal status 17-29 specifications 2-13 2-45 output control signal option D8106 17-30 grounding 3-16 3-17 dual/teaching timer instructions 22-1 hex to dual-pulse reversible counter CDP 7-11 ASCII 14-3 edit user program 14-1 18-7 hexadecimal storage decimal values...
Page 518 NDEX ID1 code pulse 28-4 20-1 of slave 0 shift/rotate 28-27 13-1 ID2 code user communication 28-4 17-1 identification week programmer 28-4 15-1 intelligent module access 28-19 IMOV instructions 23-1 IMOVN status code 23-6 indirect internal circuit bit move input 2-16 2-24 2-25...
Page 519 NDEX LRET 18-3 no operation maintain outputs while CPU stopped M8025 6-11 normal maintaining catch input 5-19 operating conditions 2-13 maintenance protocol 26-2 protected manipulated variable 21-13 data exchange off 28-15 master mode 28-15 control instruction 7-23 offline 28-15 station 25-7 Normal_Operation_Active 28-24...
Page 520 NDEX partial program download input filter using WindLDR 5-28 5-24 password interrupt input using WindLDR 5-26 5-20 modem mode using WindLDR 28-26 27-10 Periphery_OK partial program download using WindLDR 28-24 5-28 permanent RXD instruction using WindLDR 17-24 configuration data (PCD) special data register 28-26 17-32...
Page 521 NDEX communication adapter run access 2-63 communication connector cover read 23-2 communication module write 2-63 23-3 from DIN rail RUN mode control signal status 17-29 HMI module run/stop selection at memory backup error memory cartridge RUNA READ 2-66 23-2 terminal block RUNA WRITE 23-3 repeat...
Page 522 NDEX M8117 relay output 25-6 number CPU module 25-7 25-8 2-18 SOTU and SOTD instructions mixed I/O module 7-22 2-41 SOTU/SOTD instructions using with program output module 2-31 branching RS232C/RS485 converter 18-2 26-4 source serial interface 26-4 and destination operands single-phase high-speed counter 5-10 operand...
Page 523 NDEX ID quantity of inputs D8000 data 6-16 17-7 ID quantity of outputs D8001 byte count 6-16 17-12 modem mode digits 27-1 17-9 RS232C user communication status 17-3 17-11 RS485 user communication code 17-4 17-11 statuses at stop, reset, and restart troubles at system start-up 2-14 28-13...
Page 524 NDEX expansion data register 5-42 high-speed counter 5-11 5-12 input filter 5-24 interrupt input 5-20 modem mode 27-10 partial program download 5-28 RXD instruction 17-24 timer interrupt 5-22 TXD instruction 17-12 user communication 17-5 user program protection 5-25 quit setting calendar/clock 15-5 start wire-clamp terminal block...
Page 525 Tel: +886-2-2698-3929 Fax: +886-2-2698-3931 E-mail: service@tw.idec.com SINGAPORE IDEC IZUMI ASIA PTE. LTD. No. 31, Tannery Lane #05-01 HB Centre 2, Singapore 347788 Tel: +65-6746-1155 Fax: +65-6844-5995 E-mail: info@sg.idec.com www.idec.com ©2008 IDEC CORPORATION. All Rights Reserved. Manual No. FC9Y-B812-02 01/2008 B-812(2)

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Fc4a-c16r2c Fc4a-c24r2 Fc4a-c24r2c Fc4a-d20k3 Fc4a-d20s3 Fc4a-d20rk1 ... Show all

IDEC FC4A-C10R2 User Manual

Hapter

Specifications

Wiring

Nstallation and

Operation Basics

Move Instructions

Eek Programmer

Branching Instructions

Conversion

21: Pid I

Teaching

23: I Module Ai

I/O Control

25: D Lc

Link Communication

Mode

Master Communication

Troubleshooting

Ppendix

Execution Times for Instructions

Quick Links

Troubleshooting

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Summary of Contents for IDEC FC4A-C10R2