Movn (Move Not) - IDEC FC4A-C10R2 User Manual

9: M I
OVE NSTRUCTIONS

MOVN (Move Not)

MOVN(*) S1(R)
*****
Applicable CPU Modules
FC4A-C10R2/C FC4A-C16R2/C
X
Valid Operands
Operand
S1 (Source 1)
D1 (Destination 1)
For the valid operand number range, see pages 6-1 and 6-2.
▲
Internal relays M0 through M1277 can be designated as D1. Special internal relays cannot be designated as D1.
When T (timer) or C (counter) is used as S1, the timer/counter current value is read out. When T (timer) or C (counter) is
used as D1, the data is written in as a preset value which can be 0 through 65535.
Valid Data Types
W (word) I (integer)
X X
Examples: MOVN
MOVN(W) S1 –
M10
I0
M10 through M17, M20 through M27 NOT
MSB
Before inversion
0 0
(M27-M10):
MSB
After inversion
1 1
(M67-M50):
MOVN(W) S1 –
810
I1
Before inversion (810):
After inversion (64725):
MOVN(W) S1 –
D30
I2
9-4
D1(R) REP
***** **
FC4A-C24R2/C
X X
Function
First operand number to move
First operand number to move to
When a bit operand such as I (input), Q (output), M (internal relay), or R (shift register) is
designated as the source or destination, 16 points are used. When repeat is designated for a
bit operand, the quantity of operand bits increases in 16-point increments.
When a word operand such as T (timer), C (counter), or D (data register) is designated as the
source or destination, 1 point is used. When repeat is designated for a word operand, the
quantity of operand words increases in 1-point increments.
D1 – REP
M50
S1
1 1 0 0 0 0 0 0
D1
0 0 1 1 1 1 1 1
D1 – REP
D2
MSB
0 0 0 0 0
MSB
1 1 1 1 1
D1 – REP
D20
« FC4A M
S1 NOT → D1
When input is on, 16-bit data from operand designated by S1 is inverted
bit by bit and moved to operand designated by D1.
FC4A-D20K3/S3
X
I
X
—
M10 NOT → M50
When input I0 is on, the 16 internal relays starting with M10 designated
by source operand S1 are inverted bit by bit and moved to 16 internal
relays starting with M50 designated by destination operand D1.
M50 through M57, M60 through M67
LSB The ON/OFF statuses of the 16 internal relays M10
1 1 1 0 0 1 through M17 and M20 through M27 are inverted
and moved to 16 internal relays M50 through M57
LSB
and M60 through M67. M50 is the LSB (least signif-
0 0 0 1 1 0
icant bit), and M67 is the MSB (most significant bit).
810 NOT → D2
When input I1 is on, decimal constant 810 designated by source operand
S1 is converted into 16-bit binary data, and the ON/OFF statuses of the
16 bits are inverted and moved to data register D2 designated by destina-
tion operand D1.
S1
0 1 1 0 0 1 0 1 0
D1
1 0 0 1 1 0 1 0 1
D30 NOT → D20
When input I2 is on, the data in data register
D30 designated by S1 is inverted bit by bit and
moved to data register D20 designated by D1.
S U ' M
ICRO MART SER S ANUAL
FC4A-D20RK1/RS1 & FC4A-D40K3/S3
X
Q M R T C D
X X X X X X
▲
X X X X X
LSB
D0
1 0
D1
LSB
64725
D2
0 1
D20
D30
»
Constant Repeat
X 1-99
— 1-99
810
64605
930