Rotr (Rotate Right) - IDEC FC4A-C10R2 User Manual

ROTR (Rotate Right)

ROTR(W)
*****
When bits to rotate = 1
Before rotation:
After rotation:
Applicable CPU Modules
FC4A-C10R2/C FC4A-C16R2/C
X
Valid Operands
Operand
S1 (Source 1)
bits
For the valid operand number range, see pages 6-1 and 6-2.
▲
Internal relays M0 through M1277 can be designated as S1. Special internal relays cannot be designated as S1.
The quantity of bits to rotate can be 1 through 15.
Since the ROTR instruction is executed in each scan while input is on, a pulse input from a SOTU or SOTD instruction
should be used as required.
Valid Data Types
W (word) I (integer)
X —
Example: ROTR
MOV(W) S1 –
M8120
ROTR(W)
SOTU
I1
Bits to rotate = 2
Before rotation: D20 = 13
After first rotation: D20 = 16387
After second rotation: D20 = 53248
When input is on, 16-bit data of the designated source operand S1 is rotated to
S1 bits
the right by the quantity of bits designated by operand bits.
**
The result is set to the source operand S1, and the last bit status rotated out is
set to a carry (special internal relay M8003).
MSB
1
MSB
0
FC4A-C24R2/C
X X
Function
Data for bit rotation
Quantity of bits to rotate
When a bit operand such as Q (output), M (internal relay), or R (shift register) is designated
as the source, 16 points are used.
When a word operand such as D (data register) is designated as the source, 1 point is used.
D1 – REP
13 D20
S1 bits
D20 2
« FC4A M
S1
0 0 1 1 0 1 0 1
Rotate to the right
S1
1 0 0 1 1 0 1 0
FC4A-D20K3/S3
X
I
—
— — — — — — —
M8120 is the initialize pulse special internal relay.
When the CPU starts operation, the MOV (move) instruction sets 13 to
data register D20.
Each time input I1 is turned on, 16-bit data of data register D20 is rotated
to the right by 2 bits as designated by operand bits.
The last bit status rotated out is set to a carry (special internal relay
M8003).
D20
MSB
0 0 0 0 0 0 0 0 0
D20
MSB
0 1 0 0 0 0 0 0 0
D20
MSB
1 1 0 1 0 0 0 0 0
S U ' M
ICRO MART SER S ANUAL
13: S / R
HIFT OTATE
LSB
1 1 0 0 1 1 0
LSB
1 1 1 0 0 1 1
FC4A-D20RK1/RS1 & FC4A-D40K3/S3
Q M R T C D
▲
X X — — X
LSB
0 0 0 1 1 0 1
LSB
0 0 0 0 0 1 1
LSB
0 0 0 0 0 0 0
»
I
NSTRUCTIONS
CY
M8003
CY
0
M8003
X
Constant Repeat
— —
1-15 —
CY
M8003
CY
0
M8003
CY
1
M8003
13-7