Tml, Tim, Tmh, And Tms (Timer) - IDEC FC4A-C10R2 User Manual

Fc4a series microsmart micro programmable logic controller
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TML, TIM, TMH, and TMS (Timer)

Four types of timedown timers are available; 1-sec timer TML, 100-ms timer TIM, 10-ms timer TMH, and 1-ms timer
TMS. A total of 32 timers (all-in-one 10-I/O type CPU module) or 100 timers (other CPU modules) can be programmed in
a user program. Each timer must be allocated to a unique number T0 through T31 or T99.
Timer
TML (1-sec timer)
TIM (100-ms timer)
TMH (10-ms timer)
TMS (1-ms timer)
The valid operand range depends on the CPU module type. For details, see pages 6-1 and 6-2.
The preset value can be 0 through 65535 and designated using a decimal constant or data register.
TML (1-sec Timer)
Ladder Diagram (TML)
TML
T0
4
I0
I1
T0
Q0
TIM (100-ms Timer)
Ladder Diagram (TIM)
TIM
T1
20
I0
I1
T1
Q1
TMH (10-ms Timer)
Ladder Diagram (TMH)
TMH
T2
100
I0
I1
T2
Q2
TMS (1-ms Timer)
Ladder Diagram (TMS)
TMS
T3
500
I0
I1
T3
Q3
Allocation Number
T0 to T99
0 to 65535 sec
T0 to T99
0 to 6553.5 sec
T0 to T99
0 to 655.35 sec
T0 to T99
0 to 65.535 sec
Program List
Instruction
LOD
TML
LOD
AND
OUT
Program List
Instruction
LOD
TIM
LOD
AND
OUT
Program List
Instruction
LOD
TMH
LOD
AND
OUT
Program List
Instruction
LOD
TMS
LOD
AND
OUT
« FC4A M
ICRO
Range
Increments
1 sec
100 ms
10 ms
1 ms
Timing Chart
Data
I0
I0
T0
T0
4
I1
I1
T0
Q0
Q0
Timing Chart
Data
I0
I0
T1
T1
20
I1
I1
T1
Q1
Q1
Timing Chart
Data
I0
I0
T2
T2
100
I1
I1
T2
Q2
Q2
Timing Chart
Data
I0
I0
T3
T3
500
I1
I1
T3
Q3
Q3
S
U
'
M
»
MART
SER
S
ANUAL
7: B
ASIC
Preset Value
Constant:
0 to 65535
Data registers: D0 to D1299
D2000 to D7999
ON
OFF
4 sec
ON
OFF
ON
OFF
ON
OFF
ON
OFF
2 sec
ON
OFF
ON
OFF
ON
OFF
ON
OFF
1 sec
ON
OFF
ON
OFF
ON
OFF
ON
OFF
0.5 sec
ON
OFF
ON
OFF
ON
OFF
I
NSTRUCTIONS
7-7

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