Typical System Implementation Diagrams; Figure 3-1: Typical System Diagram (Sh-4 Bus); Figure 3-2: Typical System Diagram (Sh-3 Bus) - Epson S1D13505 Technical Manual

Epson Research and Development
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3 Typical System Implementation Diagrams

SH-4
BUS
A[21]
CSn#
A[20:0]
D[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
RDY#
CKIO
RESET#
SH-3
BUS
A[21]
CSn#
A[20:0]
D[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
CKIO
RESET#
Hardware Functional Specification
Issue Date: 01/02/02
Management
M/R#
CS#
AB[20:0]
DB[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
BUSCLK
RESET#

Figure 3-1: Typical System Diagram (SH-4 Bus)

.
Management
M/R#
CS#
AB[20:0]
DB[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
BUSCLK
RESET#

Figure 3-2: Typical System Diagram (SH-3 Bus)

Power
Oscillator
S1D13505F00A
RED,GREEN,BLUE
256Kx16
FPM/EDO-DRAM
Power
Oscillator
S1D13505F00A
RED,GREEN,BLUE
256Kx16
FPM/EDO-DRAM
FPDAT[15:8]
UD[7:0]
FPDAT[7:0]
LD[7:0]
4/8/16-bit
FPSHIFT
FPSHIFT
FPFRAME FPFRAME Display
FPLINE FPLINE
DRDY
MOD
LCDPWR
CRT
HRTC
Display
VRTC
IREF
IREF
FPDAT[15:8]
UD[7:0]
FPDAT[7:0]
LD[7:0]
4/8/16-bit
FPSHIFT FPSHIFT
Display
FPFRAME FPFRAME
FPLINE
FPLINE
DRDY
MOD
LCDPWR
CRT
HRTC
Display
VRTC
IREF
IREF
Page 15
LCD
LCD
S1D13505
X23A-A-001-14