Summary Of Configuration Options; Table 5-5: Summary Of Power On/Reset Options; Vancouver Design Center - Epson S1D13505 Technical Manual

Embedded ramdac lcd/crt controller
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5.3 Summary of Configuration Options

Pin Name
MD0
8-bit host bus interface
Select host bus interface:MD[11] = 0:
000 = SH-3/SH-4 bus interface
001 = MC68K Bus 1
010 = MC68K Bus 2
MD[3:1]
011 = Generic
100 = Reserved
101 = MIPS/ISA
110 = PowerPC
111 = PC Card (when MD11 = 1 Philips PR31500/PR31700 or Toshiba TX3912 Bus)
MD4
Little Endian
MD5
WAIT# is active high (1 = insert wait state)
Memory Address/GPIO configuration:
00 = symmetrical 256K 16 DRAM. MA[8:0] = DRAM address. MA[11:9] = GPIO2,1,3 pins.
MD[7:6]
01 = symmetrical 1M 16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
10 = asymmetrical 256K 16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
11 = asymmetrical 1M 16 DRAM. MA[11:0] = DRAM address.
MD8
Not used
MD9
SUSPEND# pin configured as GPO output
Active low LCDPWR polarity or
MD10
active high GPO polarity
MD11
Alternate Host Bus Interface Selected
MD12
BUSCLK input divided by 2
MD[15:13]
Not used
Hardware Functional Specification
Issue Date: 01/02/02

Table 5-5: Summary of Power On/Reset Options

value on this pin at rising edge of RESET# is used to configure:
1
16-bit host bus interface
Big Endian
WAIT# is active low (0 = insert wait state)
SUSPEND# pin configured as SUSPEND# input
Active high LCDPWR polarity or
active low GPO polarity
Primary Host Bus Interface Selected
BUSCLK input not divided
Page 33
(1/0)
0
S1D13505
X23A-A-001-14

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