Vancouver Design Center - Epson S1D13505 Technical Manual

Embedded ramdac lcd/crt controller
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Vancouver Design Center

Symbol
Read Command Setup (REG[22h] bit 4 = 0 and bits
3-2 = 00)
Read Command Setup (REG[22h] bit 4 = 0 and bits
3-2 = 10)
t12
Read Command Setup (REG[22h] bit 4 = 1 and bits
3-2 = 00)
Read Command Setup (REG[22h] bit 4 = 1 and bits
3-2 = 10)
Read Command Setup (REG[22h] bits 3-2 = 01)
Read Command Hold (REG[22h] bit 4 = 0 and bits 3-
2 = 00)
Read Command Hold (REG[22h] bit 4 = 0 and bits 3-
2 = 10)
t13
Read Command Hold (REG[22h] bit 4 = 1 and bits 3-
2 = 00)
Read Command Hold (REG[22h] bit 4 = 1 and bits 3-
2 = 10)
Read Command Hold (REG[22h] bits 3-2 = 01)
t14
Read Data Setup referenced from CAS#
t15
Read Data Hold referenced from CAS#
t16
Last Read Data Setup referenced from RAS#
t17
Bus Turn Off from RAS#
t18
Write Command Setup
t19
Write Command Hold
t20
Write Data Setup
t21
Write Data Hold
t22
MD Tri-state
t23
CAS# to WE# active during Read-Write cycle
t24
Write Command Setup during Read-Write cycle
Last Read Data Setup referenced from WE# during
t25
Read-Write cycle
t26
Bus Tri-state from WE# during Read-Write cycle
Hardware Functional Specification
Issue Date: 01/02/02
Table 7-15: EDO-DRAM Read/Write/Read-Write Timing
Parameter
Min
4.45 t1 - 3
3.45 t1 - 3
3.45 t1 - 3
2.45 t1 - 3
3.45 t1 - 3
3.45 t1 - 3
2.45 t1 - 3
2.45 t1 - 3
1.45 t1 - 3
2.45 t1 - 3
5
3
5
3
0.45 t1- 3
0.45 t1 - 3
0.45 t1 - 3
0.45 t1 - 3
0.45 t1
0.45t1 + 21
1 t1 - 3
1.45 t1- 3
10
0
Page 65
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t1- 5
ns
ns
ns
ns
ns
ns
ns
ns
ns
t1- 5
ns
S1D13505
X23A-A-001-14

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