Table 14-2: Maximum Pclk Frequency With Fpm-Dram - Epson S1D13505 Technical Manual

Page 140
Ink
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel with Half Frame Buffer
Disabled.
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual Monochrome/Color Panel
with Half Frame Buffer Disabled.
off
• Dual Monochrome with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Monochrome Panel with
Half Frame Buffer Enable.
• Dual Color with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Color Panel with Half
Frame Buffer Enable.
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel with Half Frame Buffer
Disabled.
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual Monochrome/Color Panel
with Half Frame Buffer Disabled.
on
• Dual Monochrome with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Monochrome Panel with
Half Frame Buffer Enable.
• Dual Color with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Color Panel with Half
Frame Buffer Enable.
S1D13505
X23A-A-001-14

Table 14-2: Maximum PCLK Frequency with FPM-DRAM

Display type
Maximum PCLK allowed
N
RC
1 bpp 2 bpp
5, 4, 3
5 MCLK/2 MCLK/2
4 MCLK/2 MCLK/2
3 MCLK MCLK
5 MCLK/2 MCLK/2
4 MCLK/2 MCLK/2
3 MCLK/2 MCLK/2
5 MCLK/2 MCLK/2
4 MCLK MCLK
3 MCLK MCLK
5 MCLK/2 MCLK/2
4 MCLK/2 MCLK/2
3 MCLK/2 MCLK/2
5 MCLK/3 MCLK/3
4 MCLK/2 MCLK/2
3 MCLK/2 MCLK/2
Epson Research and Development
Vancouver Design Center
4 bpp 8 bpp 16 bpp
MCLK
MCLK/2 MCLK/2 MCLK/3
MCLK/2 MCLK/2 MCLK/2
MCLK MCLK/2 MCLK/2
MCLK/2 MCLK/2 MCLK/3
MCLK/2 MCLK/2 MCLK/3
MCLK/2 MCLK/2 MCLK/2
MCLK/2 MCLK/2 MCLK/3
MCLK/2 MCLK/2 MCLK/2
MCLK MCLK/2 MCLK/2
MCLK/3 MCLK/3 MCLK/3
MCLK/2 MCLK/2 MCLK/3
MCLK/2 MCLK/2 MCLK/3
MCLK/3 MCLK/3 MCLK/4
MCLK/2 MCLK/3 MCLK/3
MCLK/2 MCLK/2 MCLK/3
Hardware Functional Specification
Issue Date: 01/02/02