Figure 3-9: Typical System Diagram (Power Pc Bus); Figure 3-10: Typical System Diagram (Pc Card (Pcmcia) Bus) - Epson S1D13505 Technical Manual

Epson Research and Development
Vancouver Design Center
PowerPC
BUS
A[0:10]
A[11:31]
D[0:15]
BI#
TS#
RD/WR#
TSIZ0
TSIZ1
TA#
CLKOUT
RESET#
PC Card
BUS
A[25:21]
A[20:0]
D[15:0]
-WE
-CE2
-OE
-CE1
-WAIT
BCLK
RESET
Hardware Functional Specification
Issue Date: 01/02/02
Power
Management
M/R#
Decoder
CS#
Decoder
AB[20:0]
DB[15:0]
WE1#
BS#
S1D13505F00A
RD/WR#
RD#
WE0#
WAIT#
BUSCLK
RESET#

Figure 3-9: Typical System Diagram (Power PC Bus)

Power
Management
Decoder M/R#
Decoder
CS#
AB[20:0]
DB[15:0]
S1D13505F00A
WE0#
WE1#
RD#
RD/WR#
WAIT#
BUSCLK
RESET#

Figure 3-10: Typical System Diagram (PC Card (PCMCIA) Bus)

.
Oscillator
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
RED,GREEN,BLUE
HRTC
VRTC
IREF
256Kx16
FPM/EDO-DRAM
.
Oscillator
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
RED,GREEN,BLUE
HRTC
VRTC
IREF
1Mx16
FPM/EDO-DRAM
Page 19
UD[7:0]
LD[7:0]
4/8/16-bit
FPSHIFT
LCD
Display
FPFRAME
FPLINE
MOD
CRT
Display
IREF
UD[7:0]
LD[7:0]
4/8/16-bit
FPSHIFT
LCD
FPFRAME Display
FPLINE
MOD
CRT
Display
IREF
S1D13505
X23A-A-001-14