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Epson Research and Development
Vancouver Design Center
Symbol
I
Quiescent Current
DDS
I
Input Leakage Current
IZ
I
Output Leakage Current
OZ
V
High Level Output Voltage
OH
V
Low Level Output Voltage
OL
V
High Level Input Voltage
IH
V
Low Level Input Voltage
IL
V
High Level Input Voltage
T+
V
Low Level Input Voltage
T-
V
Hysteresis Voltage
H1
R
Pull Down Resistance
PD
C
Input Pin Capacitance
I
C
Output Pin Capacitance
O
C
Bi-Directional Pin Capacitance
IO
Hardware Functional Specification
Issue Date: 01/02/02
Table 6-3: Electrical Characteristics for VDD = 5.0V typical
Parameter
Quiescent Conditions
VDD = min
I
OL
VDD = min
I
OL
CMOS level, V
CMOS level, V
CMOS Schmitt,
V
DD
CMOS Schmitt,
V
DD
CMOS Schmitt,
V
DD
V
I
Condition
-1
-1
=
-4mA (Type1),
V
DD
-8mA (Type2)
-12mA (Type3)
=
4mA (Type1),
8mA (Type2)
12mA (Type3)
= max
3.5
DD
= min
DD
= 5.0V
0.8
= 5.0V
0.3
= 5.0V
= V
50
DD
Min
Typ
Max
400
1
1
- 0.4
0.4
1.0
4.0
100
200
12
12
12
Page 39
Units
uA
A
A
V
V
V
V
V
V
V
k
pF
pF
pF
S1D13505
X23A-A-001-14
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