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3.
Operation
3.1
Description
S2R72A21 prepares 2 USB paths, Bus Switch and the HS Synchronizer.
The Bus switch electrically connects INT_DP/DM and EXT_DP/DM. The LS/FS signal or BC signals are passed
by.
The HS Synchronizer is a feature which re-synchronizes the HS signal received from either INT_DP/DM or
EXT_DP/DM and send out to the other port.
The objective paths are switched automatically by the internal Bus Monitor.
3.2
Basic system structure
As the basic system structure, here shows an example where S2R72A21 is mounted on the Car Navigation or
Display Audio's board (Host SoC board). S2R72A21 intervenes between the Host SoC's USB port and the USB
type-A receptacle, and connects the Host SoC (as Host) and Portable device such as smart phones (as Device).
The following is the pin connection example of S2R72A21 with this structure.
HVDD
Regulator
HVDD
Host SoC
XRESET
GPIO
ENABLE
SDA
I2C
master
SCL
DP
DM
Regulator
VBUS
S2R72A21 Application Note
(Rev.1.00)
HVDD
ADJ4
ADJ3
S2R72A21
INT_DP
INT_DM
BC
Figure 3.2.1
Basic system structure of S2R72A21
Seiko Epson Corporation
Host SoC board
Slave
address
setting
STAT1
STAT0
EXT_DP
EXT_DM
EP
VSS
Portable
Device
VBUS
DP
DM
5
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