Toshiba Interface Timing (E.g. Tx3912); Figure 7-10: Toshiba Timing; Vancouver Design Center - Epson S1D13505 Technical Manual

Embedded ramdac lcd/crt controller
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7.1.9 Toshiba Interface Timing (e.g. TX3912)

t1
DCLKOUT
ADDR[12:0]
ALE
CARDREG*
CARDxCSH*
CARDxCSL*
CARDIORD*
CARDIOWR*
WE* RD*
CARDxWAIT*
D[31:16](write)
D[31:16](read)
S1D13505
X23A-A-001-14
t3
t2
t4
t6
t7
t9
t11
t13

Figure 7-10: Toshiba Timing

Epson Research and Development

Vancouver Design Center

t5
t8
t10
t12
t15
t14
Hardware Functional Specification
Issue Date: 01/02/02

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