Epson Research and Development
Vancouver Design Center
7.3.4 FPM-DRAM Read/Write/Read-Write Timing
Memory
Clock
RAS#
CAS#
MA
WE#(read)
MD(read)
WE#(write)
MD(write)
Hardware Functional Specification
Issue Date: 01/02/02
t1
t2
t4
t3
t8
t9
t10
R
C1
t12
Figure 7-18: FPM-DRAM Read/Write Timing
t5
t6
t1
t7
t11 t10 t11
C2
C3
t14
d1
d2
d3
t16
t17
t18 t19
t20
d1
d2
d3
t13
t15
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