Figure 7-43: Tft/D-Tfd A.c. Timing; Vancouver Design Center - Epson S1D13505 Technical Manual

Embedded ramdac lcd/crt controller
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Vancouver Design Center

FPFRAME
FPLINE
FPLINE
DRDY
t1
t2
t3
FPSHIFT
R[5:1]
G[5:0]
B[5:1]
Note: DRDY is used to indicate the first pixel
Hardware Functional Specification
Issue Date: 01/02/02
t9
t12
t7
t17
t11

Figure 7-43: TFT/D-TFD A.C. Timing

t8
t6
t14
t13
t4
t5
1
2
639
t10
Page 95
t15
t16
640
S1D13505
X23A-A-001-14

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