Mpc750 Microprocessor Instruction Set - Motorola MPC750 User Manual

Memory control instructions-These instructions provide control of caches, TLBs,
and SRs.
- Supervisor-level cache management instructions
- User-level cache instructions
- Segment register manipulation instructions
- Translation lookaside buffer management instructions
This grouping does not indicate the execution unit that executes a particular instruction or
group of instructions.
Integer instructions operate on byte, half-word, and word operands. Floating-point
instructions operate on single-precision (one word) and double-precision (one double
word) floating-point operands. The PowerPC architecture uses instructions that are four
bytes long and word-aligned. It provides for byte, half-word, and word operand loads and
stores between memory and a set of 32 GPRs. It also provides for word and double-word
operand loads and stores between memory and a set of 32 floating-point registers (FPRs).
Computational instructions do not modify memory. To use a memory operand in a
computation and then modify the same or another memory location, the memory contents
must be loaded into a register, modified, and then written back to the target location with
distinct instructions.
PowerPC processors follow the program flow when they are in the normal execution state.
However, the flow of instructions can be interrupted directly by the execution of an
instruction or by an asynchronous event. Either kind of exception may cause one of several
components of the system software to be invoked.
Effective address computations for both data and instruction accesses use 32-bit unsigned
binary arithmetic. A carry from bit 0 is ignored in 32-bit implementations.
1.5.2 MPC750 Microprocessor Instruction Set
The MPC750 instruction set is defined as follows:
• The MPC750 provides hardware support for all 32-bit PowerPC instructions.
• The MPC750 implements the following instructions optional to the PowerPC
architecture:
- External Control In Word Indexed (eciwx)
- External Control Out Word Indexed (ecowx)
- Floating Select (fsel)
- Floating Reciprocal Estimate Single-Precision (fres)
- Floating Reciprocal Square Root Estimate (frsqrte)
- Store Floating-Point as Integer Word (stfiwx)
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