Terminology Conventions - Motorola MPC750 User Manual

Table i. Acronyms and Abbreviated Terms (Continued)
Term Meaning
TLB Translation lookaside buffer
TTL Transistor-to-transistor logic
UIMM Unsigned immediate value
UISA User instruction set architecture
UMMCRn User monitor mode control registers
UPMCn User performance monitor counter registers
USIA User sampled instruction address register
VEA Virtual environment architecture
WAR Write-alter-read
WAW Write-alter -write
WIMG Write-through/caching-inhibited/memory-coherency enforced/guarded bits
XATC Extended address transfer code
XER Register used for indicating conditions such as carries and overflows for integer operations
Terminology Conventions
Table ii describes terminology conventions used in this manual and the equivalent
terminology used in the PowerPC architecture specification.
Table ii. Terminology Conventions
The Architecture Specification This Manual
Data storage interrupt (OSI) OSI exception
Extended mnemonics Simplified mnemonics
Fixed-point unit (FXU) Integer unit (IU)
Instruction storage interrupt (lSI)
lSI exception
Interrupt Exception
Privileged mode (or privileged state) Supervisor-level privilege
Problem mode (or problem state) User-level privilege
Real address Physical address
Relocation
Translation
Storage (locations) Memory
Storage (the act of) Access
Store in Write back
Store through
Write through
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