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instructions defined for 64-bit implementations are treated as illegal by 32-bit
implementations such as the MPC750.
The class is determined by examining the primary opcode and the extended opcode, if any.
If
the opcode, or combination of opcode and extended opcode, is not that of a defined
instruction or of a reserved instruction, the instruction is illegal.
Instruction encodings that are now illegal may become assigned to instructions in the
architecture or may be reserved by being assigned to processor-specific instructions.
2.3.1.1 Definition of Boundedly Undefined
If instructions are encoded with incorrectly set bits in reserved fields, the results on
execution can be said to be boundedly undefined. If a user-level program executes the
incorrectly coded instruction, the resulting undefined results are bounded in that a spurious
change from user to supervisor state is not allowed, and the level of privilege exercised by
the program in relation to memory access and other system resources cannot be exceeded.
Boundedly-undefined results for a given instruction may vary between implementations,
and between execution attempts in the same implementation.
2.3.1.2 Defined Instruction Class
Defined instructions are guaranteed to be supported in all PowerPC implementations,
except as stated in the instruction descriptions in Chapter 8, "Instruction Set," in The
Programming Environments Manual. The MPC750 provides hardware support for all
instructions defined for 32-bit implementations. It does not support the optional fsqrt,
fsqrts, and tibia instructions.
A PowerPC processor invokes the illegal instruction error handler (part of the program
exception) when the unimplemented PowerPC instructions are encountered so they may be
emulated in software, as required. Note that the architecture specification refers to
exceptions as interrupts.
A defined instruction can have invalid forms. The MPC750 provides limited support for
instructions represented in an invalid form.
2.3.1.3 Illegal Instruction Class
Illegal instructions can be grouped into the following categories:
•
Instructions not defined in the PowerPC architecture. The following primary
opcodes are defined as illegal but may be used in future extensions to the
architecture:
1,4,5,6,9,22,56,57,60,61
Future versions of the PowerPC architecture may define any of these instructions to
perform new functions.
Chapter 2. MPC750 Processor Programming Model
2-33
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