Motorola MPC750 User Manual page 438

Risc
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Cache block. A small region of contiguous memory that is copied from
memory into a cache. The size of a cache block may vary among
processors; the maximum block size is one page. In PowerPC
processors, cache coherency is maintained on a cache-block basis.
Note that the term 'cache block' is often used interchangeably with
'cache line'.
Cache coherency. An attribute wherein an accurate and common view of
memory is provided to all devices that share the same memory
system. Caches are coherent if a processor performing a read from
its cache is supplied with data corresponding to the most recent value
written to memory or to another processor's cache.
Cache flush. An operation that removes from a cache any data from a
specified address range. This operation ensures that any modified
data within the specified address range is written back to main
memory. This operation is generated typically by a Data Cache
Block Flush (dcbf) instruction.
Caching-inhibited. A memory update policy in which the cache is bypassed
and the load or store is performed to or from main memory.
Cast-outs. Cache blocks that must be written to memory when a cache miss
causes a cache block to be replaced.
Changed bit. One of two page history bits found in each page table entry
(PTE). The processor sets the changed bit if any store is performed
into the page. See also Page access history bits and Referenced bit.
Clear. To cause a bit or bit field to register a value of zero. See also Set.
Completion-Completion occurs when an instruction has finished
executing, written back any results, and is removed from the
completion queue. When an instruction completes, it is guaranteed
that this instruction and all previous instructions can cause no
exceptions.
Context synchronization. An operation that ensures that all instructions in
execution complete past the point where they can produce an
exception, that all instructions in execution complete in the context
in which they began execution, and that all subsequent instructions
are fetched and executed in the new context. Context synchronization
may result from executing specific instructions (such as isync or rfi)
or when certain events occur (such as an exception).
Copy-back. An operation in which modified data in a cache block is copied
back to memory.
Glossary of Terms and Abbreviations
Glossary-3

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