Signal Configuration - Motorola MPC750 User Manual

7.1 Signal Configuration
Figure 7-1 illustrates the MPC750's signal configuration, showing how the signals are
grouped. A pinout showing pin numbers is included in the MPC750 hardware
specifications.
Address
[
Arbitration
BR
BG
ABB
Address
[
Start
TS
Address
[
Bus
A[O-31]
AP[O-3]
Transfer
[
Attributes
TT[Q-4]
TSST
TSIZ[O-2]
GBL
WT
CI
Address
[
Termination
AACK
Am'RY
Data
[
Arbitration
DBG
DBWO
DBB
Data
[
Transfer
D[tHJ3]
DP[O-7]
DBDIS
Data
[
Termination
fA
DRTRY
TEA
'\
IiL2VDD
L2AV DD
Not supported in the MPC740
1
17
L2ADDR[I6-0]
1 64
L2DATA[tHJ3]
1
8
L2DP[O-7]
1
L2CE
1
L2WE
1
2
L2CLK OUT[A-B]
L2SYNC OUT
32
1
1
L2SYNC IN
4
1
L2ZZ
5
iNT
1
1
Siiifi
3
1
1
MCP
1
SRESET
1
1
1
RR"ESET
1
MPC750
CKSTP IN
1
1
CKSTP OOT
1
1
RSRV
1
1
TBEN
1
1
TLBISYNC
1
1
QREQ
1
1
QACK
64
1
SYSCLK
8
4
PLL CFG[0-3]
1
1
CLK OUT
1
5
JTAG/COP
1
3
Factory Test
1
I I I
V DD V DD (1/0) AV DD
]
1
-
-
j
]
]
L2 Cache
Address!
Data
L2 Cache
Clock!
Control
Interrupts I
Is
Rese
Process
Statu
or
sl
01 Contr
Clock
Control
Test
Interface
Figure 7-1. MPC750 Signal Groups
Chapter 7. Signal Descriptions 7-3