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program or even if the access was prevented by memory protection. Examples of this in
PowerPC systems include the following:
•
Fetching of instructions not subsequently executed
•
A memory reference caused by a speculatively executed instruction that is
mispredicted
•
Accesses generated by an lswx or stswx instruction with a zero length
•
Accesses generated by an stwex. instruction when no store is performed because a
reservation does not exist
•
Accesses that cause exceptions and are not completed
5.4.1.2 Changed Bit
The changed bit of a page is located both in the PTE in the page table and in the copy of the
PTE loaded into the TLB (if a TLB is implemented, as in the MPC750). Whenever a data
store instruction is executed successfully, if the TLB search (for page address translation)
results in a hit, the changed bit in the matching TLB entry is checked. If it is already set, it
is not updated. If the TLB changed bit is 0, the MPC750 initiates the table search operation
to set the C bit in the corresponding PTE in the page table. The MPC750 then reloads the
TLB (with the C bit set).
The changed bit (in both the TLB and the PTE in the page tables) is set only when a store
operation is allowed by the page memory protection mechanism and the store is guaranteed
to be in the execution path (unless an exception, other than those caused by the se, rfi, or
trap instructions, occurs). Furthermore, the following conditions may cause the C bit to be
set:
•
The execution of an stwex. instruction is allowed by the memory protection
mechanism but a store operation is not performed.
•
The execution of an stswx instruction is allowed by the memory protection
mechanism but a store operation is not performed because the specified length is
zero.
•
The store operation is not performed because an exception occurs before the store is
performed.
Again, note that although the execution of the debt and debtst instructions may cause the
R bit to be set, they never cause the C bit to be set.
5.4.1.3 Scenarios for Referenced and Changed Bit Recording
This section provides a summary of the model (defined by the OEA) that is used by
PowerPC processors for maintaining the referenced and changed bits. In some scenarios,
the bits are guaranteed to be set by the processor, in some scenarios, the architecture allows
that the bits may be set (not absolutely required), and in some scenarios, the bits are
guaranteed to not be set. Note that when the MPC750 updates the R and C bits in memory,
Chapter 5. Memory Management
5-23
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