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2.3.4.6 Processor Control Instructions-UISA
Processor control instructions are used to read from and write to the condition register
(CR), machine state register (MSR), and special-purpose registers (SPRs). See
Section 2.3.5.1, "Processor Control Instructions-VEA," for the mftb instruction and
Section 2.3.6.2, "Processor Control Instructions-DEA," for information about the
instructions used for reading from and writing to the MSR and SPRs.
2.3.4.6.1 Move to/from Condition Register Instructions
Table 2-46 summarizes the instructions for reading from or writing to the condition register.
Table 2-46. Move to/from Condition Register Instructions
Name
Mnemonic
Syntax
Move to Condition Register Fields
mtcrf
CRM,rS
Move to Condition Register from XER
mcrxr
crfD
Move from Condition Register
mfcr
rD
Implementation Note-The PowerPC architecture indicates that in some implementations
the Move to Condition Register Fields (mtcrO instruction may perform more slowly when
only a portion of the fields are updated as opposed to all of the fields. The condition register
access latency for the MPC750 is the same in both cases.
2.3.4.6.2 Move to/from Special-Purpose Register Instructions (UISA)
Table 2-47 lists the mtspr and mfspr instructions.
Table 2-47. Move to/from Special-Purpose Register Instructions (UISA)
Name
Mnemonic
Syntax
Move to Special-Purpose Register
mtspr
SPR,rS
Move from Special-Purpose Register
mfspr
rD,SPR
Table 2-48 lists the SPR numbers for both user- and supervisor-level accesses.
Table 2-48. PowerPC Encodings
SPR
1
Register Name
Access
mfspr/mtspr
Decimal
spr[5-9]
spr[D-4]
CTR
9
00000
01001
User (UISA)
Both
DABR
1013
11111
10101
Supervisor (OEA)
Both
DAR
19
00000
10011
Supervisor (OEA)
Both
DBATOL
537
10000
11001
Supervisor (OEA)
Both
DBATOU
536
10000
11000
Supervisor (OEA)
Both
DBAT1L
539
10000
11011
Supervisor (OEA)
Both
2-56
MPC750 RISC Microprocessor User's Manual
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