Address Register Indirect With Displacement Mode; Address Register Indirect With Index (8-Bit Displacement) Mode - Motorola MC68030 User Manual

Enhanced 32-bit microprocessor
Hide thumbs Also See for MC68030:
Table of Contents

Advertisement

Data Organization and Addressing Capabilities

2.4.6 Address Register Indirect with Displacement Mode

In the address register indirect with displacement mode, the operand is in memory. The
address of the operand is the sum of the address in the address register plus the sign-
extended 16-bit displacement integer in the extension word. Displacements are always sign-
extended to 32 bits prior to being used in effective address calculations.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
DISPLACEMENT:
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS: 1

2.4.7 Address Register Indirect with Index (8-Bit Displacement) Mode

This addressing mode requires one extension word that contains the index register indicator
and an 8-bit displacement. The index register indicator includes size and scale information.
In this mode, the operand is in memory. The address of the operand is the sum of the
contents of the address register, the sign-extended displacement value in the low-order
eight bits of the extension word, and the sign-extended contents of the index register
(possibly scaled). The user must specify the displacement, the address register, and the
index register in this mode.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
DISPLACEMENT:
INDEX REGISTER
SCALE:
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
2-12
EA = (An) + d
16
(d ,An)
16
101
n
An
31
15
SIGN EXTENDED
EA = (An) + (XN) + d
(d ,An,Xn.SIZE*SCALE)
8
110
n
An
31
SIGN EXTENDED
31
31
SIGN-EXTENDED VALUE
7
1
MC68030 USER'S MANUAL
31
MEMORY ADDRESS
0
+
INTEGER
31
OPERAND
8
31
MEMORY ADDRESS
7
0
INTEGER
0
0
0
SCALE VALUE
X
31
OPERAND
0
0
0
+
+
0
MOTOROLA

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents