Address Register Indirect With Displacement; Address Register Indirect With Index (8-Bit Displacement) - Motorola CPU32 Reference Manual

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GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
OPERAND LENGTH (1,2, OR 4):
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
An =An -SIZE
EA= (An)
-(An)
100
n
A n - -_ _
~
31
31
OPERAND
3.4.2.4 Address Register Indirect With Displacement
In the address register indirect with displacement mode, the operand is in
memory. The address of the operand is the sum of the address in the address
register plus the sign-extended 16-bit displacement integer in the extension
word. Displacements are always sign extended to 32 bits before being used in
EA calculations.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
DISPLACEMENT:
MEMORY ADDRESS:
EA= (An) + d16
(d16 An)
101 '
n
An----~
31
MEMORY ADDRESS
~----------~----------~
31
~15
_ _ _ _ _ _
~
[ :
~NET~D~
=
INTEGER
1----'»1
31
NUMBER OF EXTENSION WORDS:
OPERAND
3.4.2.5 Address Register Indirect With Index (8-Bit Displacement)
This mode requires one extension word that contains the index register
indicator and an 8-bit displacement. The index register indicator includes size
and scale information. In this mode, the operand is in memory. The address of
the operand is the sum of the contents of the address register, the sign-
extended displacement value in the low-order eight bits of the extension word,
and the sign-extended contents of the index register (possibly scaled). The
user must specify displacement, address register, and index register.
This address mode can have either of two different formats of extension. The
brief format (8-bit displacement) requires one word of extension and provides
fast indexed addressing. The full format (16 and 32-bit displacement) provides
optional displacement size. Both forms use an index operand.
MOTOROLA
3-6
DATA ORGANIZATION AND CPU32 REFERENCE MANUAL
ADDRESSING CAPABILITIES