Stop Mode - Fujitsu F2MC-8FX Hardware Manual

F2mc-8fx 8-bit microcontroller
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6.8.3

Stop Mode

Stop mode stops the main clock.
Operations in Stop Mode
Stop mode stops the main clock. In this mode, the device stops all the functions except external interrupt
and low-voltage detection reset while retaining the contents of registers and RAM that exist immediately
before the transition to stop mode.
In main clock mode or main PLL clock mode, however, you can start or stop subclock oscillation by setting
the subclock oscillation stop bit in the system clock control register (SYCC: SUBS). When the subclock is
oscillating, the watch prescaler and watch counter operate.
Transition to stop mode
Writing "1" to the stop bit in the standby control register (STBC:STP) causes the device to enter stop mode.
At this time, the states of external pins are retained when the pin state setting bit in the standby control
register (STBC:SPL) is "0", and the states of external pins become high impedance when that bit is "1"
(those pins are pulled up for which pull-up resistor connection has been selected in the pull-up setting
register).
In main clock mode or main PLL clock mode, a timebase timer interrupt request may be generated while
the device is waiting for main clock oscillation to stabilize after being released from stop mode by an
interrupt. If the interrupt interval time of the timebase timer is shorter than the main clock oscillation
stabilization wait time, you should disable interrupt requests output from the timebase timer before entering
stop mode, thereby preventing unexpected interrupts from occurring.
You should also disable interrupt requests output from the watch prescaler before entering stop mode in
subclock mode.
Cancellation of stop mode
The device is released from stop mode in response to a reset or an external interrupt.
In main clock mode or main PLL clock mode, you can start or stop subclock oscillation by setting the
subclock oscillation stop bit in the system clock control register (SYCC: SUBS). When the subclock is
oscillating, you can also release the device from stop mode using an interrupt by the watch prescaler or
watch counter.
Note:
When stop mode is canceled via an interrupt, peripheral resources placed into stop mode during an action
resume that action. Therefore, the initial interval time of the interval timer and other similar settings are
rendered indeterminate. After recovery from stop mode, initialize each peripheral resource as necessary.
CHAPTER 6 CLOCK CONTROLLER
73

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