16.12 Operating Description Of Pwc Timer Function - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 16 8/16-BIT COMPOSITE TIMER

16.12 Operating Description of PWC Timer Function

This section describes the operations of the PWC timer function for the 8/16-bit
composite timer.
Operation of PWC Timer Function
The composite timer requires the settings shown in Figure 16.12-1 to serve as the PWC timer function.
T00/01CR0
T00/01CR1
TMCR
T00/01DR
When the PWC timer function is selected, the width and cycle of an external input pulse can be measured.
The edges to start and end counting are selected by timer operation mode setting (T00CR0/T01CR0:F3, F2,
F1, F0).
In this operation mode, the counter starts counting from "00
edge of an external input signal. Upon detection of the specified count end edge, the count value is
transferred to the 8/16-bit composite timer 00/01 data register (T00DR/T01DR) and the interrupt flag
(T00CR1/T01CR1:IR) and buffer full flag (T00CR1/T01CR1:BF) are set to "1". The buffer full flag is set
to "0" when the 8/16-bit composite timer 00/01 data register (T00DR/T01DR) is read from.
The 8/16-bit composite timer 00/01 data register holds data with the buffer full flag set to "1". Even when
the next edge is detected at this time, the next measurement result is lost as the count value is not
transferred to the 8/16-bit composite timer 00/01 data register.
As the exception, when the H-pulse and cycle measurement (T00CR0/T01CR0:F3, F2, F1, F0 = "1001
is selected, the H-pulse measurement result is transferred to the 8/16-bit composite timer 00/01 data register
with the BF bit set to "1", but the cycle measurement result is not transferred to the 8/16-bit composite
timer 00/01 data register with the BF bit set to "1". For cycle measurement, therefore, the H-pulse
measurement result must be read before the cycle is completed. Note also that the result of H-pulse
measurement or cycle measurement is lost unless read before the completion of the next H pulse.
To measure the time exceeding the length of the counter, you can use software to count the number of
occurrences of a counter overflow. When the counter causes an overflow, the interrupt flag (T00CR1/
T01CR1:IF) is set to "1". The interrupt service routine can therefore be used to count the number of times
the overflow occurs.
266
Figure 16.12-1 Settings for PWC Timer Function
bit7 bit6 bit5
IFE C2 C1
STA HO IE
1
TO1 TO0 IIS
Holds pulse width measurement value
: Used bit
×: Unused bit
1: Set "1"
0: Set "0"
bit4 bit3 bit2
C0 F3 F2
IR BF IF
MOD FE11 FE10
" upon detection of the specified count start
H
bit1 bit0
F1 F0
SO OE
×
FE01 FE00
")
B