Operating Explanation Of Prescaler - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 6 CLOCK CONTROLLER
6.12

Operating Explanation of Prescaler

The prescaler generates count clock sources to individual peripheral resources.
Operations of Prescaler
The prescaler generates count clock sources from the frequency-divided version of the machine clock
(MCLK) and buffered signals from the timebase timer (2
peripheral resources. The prescaler remains operating as long as the machine clock and timebase timer
clocks are supplied.
Table 6.12-1 lists the count clock sources generated by the prescaler.
Table 6.12-1 Count Clock Sources Generated by Prescaler
Count Clock Source
2/MCLK
4/MCLK
8/MCLK
16/MCLK
32/MCLK
7
2 / F
CH
8
2 / F
CH
80
Cycle (F
Cycle
MCLK=10MHz)
MCLK/2
MCLK/4
MCLK/8
MCLK/16
MCLK/32
7
F /2
CH
8
F /2
CH
7
/ F
=10MHz, Cycle (F
CH
MCLK=16MHz)
(5MHz) MCLK/2
(2.5MHz) MCLK/4
(1.25MHz) MCLK/8
(0.625MHz) MCLK/16
(0.3125MHz) MCLK/32
7
(78kHz)
F /2
CH
8
(39kHz)
F /2
CH
8
, 2 / F ) and supplies them to individual
CH CH
=16MHz, Cycle (F
CH
MCLK=16.25MHz)
(8MHz) MCLK/2
(4MHz) MCLK/4
(2MHz) MCLK/8
(1MHz) MCLK/16
(0.5MHz) MCLK/32
7
(125kHz)
F /2
CH
8
(62.5kHz)
F /2
CH
=16.25MHz,
CH
(8.125MHz)
(4.0625MHz)
(2.0313MHz)
(1.0156MHz)
(0.5078MHz)
(127kHz)
(63.5kHz)