Fujitsu F2MC-8FX Hardware Manual page 110

CHAPTER 8 INTERRUPTS
(1) Any interrupt request is disabled immediately after a reset. In the peripheral resource initialization
program, initialize those peripheral resources which generate interrupts and set their interrupt levels in
their respective interrupt level setting registers (ILR0 to ILR5) before starting operating the peripheral
resources. The interrupt level can be set to 0, 1, 2, or 3. Level 0 is given the highest priority, and level 1
the second highest. Setting level 3 for a peripheral resource disables interrupts from that resource.
(2) Execute the main program (or the interrupt service routine for nested interrupts).
(3) When an interrupt is triggered in a peripheral resource, the interrupt request flag bit of the peripheral
resource is set to "1". If the interrupt request enable bit of the peripheral resource has been set to enable
interrupts, the interrupt request is then output to the interrupt controller.
(4) The interrupt controller always monitors interrupt requests from individual peripheral resources and
transfers the highest-priority interrupt level, to the CPU, among the interrupt levels of the currently
generated interrupt requests. The relative priority to be assigned if another request with the same
interrupt level occurs simultaneously is also determined at this time.
(5) If the received interrupt level or priority is lower than the level set in the interrupt level bits in the
condition code register (CCR: IL1, IL0), the CPU checks the content of the interrupt enable flag
(CCR:I) and, if interrupts are enabled (CCR:I = 1), accepts the interrupt.
(6) The CPU pushes the contents of the program counter (PC) and program status (PS) register onto the
stack, fetches the start address of the interrupt service routine from the corresponding interrupt vector
table, changes the value of the interrupt level bits in the condition code register (CCR: IL1, IL0) to the
value of the received interrupt level, then starts the execution of the interrupt service routine.
(7) Finally, the CPU uses the RETI instruction to restore the program counter (PC) and program status (PS)
values from the stack and resumes execution from the instruction that follows the instruction executed
prior to the interrupt.
Note:
The interrupt request flag bits of peripheral resources are not automatically cleared to "0" after an interrupt
request is accepted. The bits must therefore be cleared to "0" by a program (by writing "0" to the interrupt
request flag bit) in the interrupt service routine.
An interrupt causes the device to recover from standby mode (low power consumption mode). For details,
see 6.8 Operations in Low-power Consumption Modes (Standby Modes).
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