Register Bank Pointer (Rp) - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 5 CPU
5.1.1

Register Bank Pointer (RP)

The register bank pointer (RP) in bits 15 to 11 of the program status (PS) register
contains the address of the general-purpose register bank that is currently in use and is
translated into a real address when general-purpose register addressing is used.
Configuration of Register Bank Pointer (RP)
Figure 5.1-2 shows the configuration of the register bank pointer.
RP
bit15 bit14 bit13 bit12 bit11 bit10 bit9
PS
R4 R3 R2
The register bank pointer contains the address of the register bank currently being used. The content of the
register bank pointer is translated into a real address according to the rule shown in Figure 5.1-3.
Figure 5.1-3 Rule for Translation into Real Addresses in General-purpose Register Area
Generated
address
The register bank pointer specifies the register bank used as general-purpose registers in the RAM area.
There are a total of 32 register banks. The current register bank is specified by setting a value between 0
and 31 in the upper five bits of the register bank pointer. Each register bank has eight 8-bit general-purpose
registers which are selected by the lower three bits of the op-code.
The register bank pointer allows the space from 0100
register area. Note, however, that the available area is limited depending on the product. The initial value
after a reset is 0000
Mirror Address for Register Bank and Direct Bank Pointers
The register bank pointer (RP) and direct bank pointer (DP) can be written to and read from by accessing
the program status (PS) register using the "MOVW A,PS" and "MOVW PS,A" instructions, respectively.
They can also be written to and read from directly by accessing mirror address 0078
pointer.
34
Figure 5.1-2 Configuration of Register Bank Pointer
DP
bit8
DP2 DP1 DP0
R1 R0
Fixed value
"0" "0" "0" "0" "0"
↓ ↓ ↓ ↓ ↓
A15 A14 A13 A12 A11 A10 A9
.
H
CCR
bit7 bit6 bit5 bit4
H I IL1 IL0
RP: Upper
"0" "0" "1" R4 R3
↓ ↓ ↓ ↓ ↓
A8 A7 A6
to up to 01FF
H
bit3 bit2 bit1 bit0
N Z V C
Op-code: Lower
R2 R1 R0 b2 b1
↓ ↓ ↓ ↓ ↓
A5 A4 A3 A2 A1
to be used as a general-purpose
H
of the register bank
H
RP Initial
value
00000
B
b0
↓
A0