Port 5 Registers - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 9 I/O PORT
9.5.1

Port 5 Registers

This section describes the port 5 registers.
Port 5 Register Function
Table 9.7-2 lists the port 5 register functions.
Table 9.5-2 Port 5 Register Function
Register
Data
name
0
PDR5
1
0
DDR5
1
00
01
ILSR,ILSR2
10
11
*: For N-ch open drain pin, this should be Hi-Z.
Table 9.7-3 lists the correspondence between port 5 pins and each register bit.
Table 9.5-3 Correspondence Between Registers and Pins for Port 5
Pin name -
PDR5
-
DDR5
ILSR -
ILSR2 -
122
Read
Pin state is "L" level.
Pin state is "H" level.
Automotive input level selection
Correspondence between related register bits and pins
- -
- -
- -
- -
Read read-modify-write
PDR value is "0".
PDR value is "1".
Port input enabled
Port output enabled
Hysteresis input level selection
CMOS input level selection
- -
- -
- -
- -
Write
As output port, outputs
"L" level.
As output port, outputs
"H" level*.
- P51 P50
- bit1 bit0
- bit4 bit3
- bit4 bit4