Interrupts - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 8 INTERRUPTS
8.1

Interrupts

This section explains the interrupts.
Overview of Interrupts
2
The F MC-8FX family has 24 interrupt request input lines corresponding to peripheral resources, for each
of which an interrupt level can be set independently.
When a peripheral resource generates an interrupt request, the interrupt request is output to the interrupt
controller. The interrupt controller checks the interrupt level of that interrupt request and then passes the
occurrence of the interrupt to the CPU. The CPU services the interrupt according to the interrupt
acceptance status. Interrupt requests also release the device from standby mode to resume instruction
execution.
Interrupt Requests from Peripheral Resources
When an interrupt is accepted, a branch to the interrupt service routine takes place with the content of the
interrupt vector table address corresponding to the interrupt request as the address of the branch destination.
The priority for each interrupt request can be set to one of four levels using the interrupt level setting
registers (ILR0 to ILR5).
If another interrupt request with the same or lower level occurs during execution of the interrupt service
routine, the interrupt is processed after the current interrupt handler routine completes. If interrupt requests
of the same level occur at the same time, IRQ0 is assigned the highest priority.
92