Fujitsu F2MC-8FX Hardware Manual page 295

Figure 17.4-3 Block Diagram of Pin Related to 16-bit PPG (PPG6, PPG7)
Peripheral function input
Peripheral function output enable
Peripheral function output
0
1
PDR read
PDR
PDR write
In bit operation instruction
DDR read
DDR
DDR write
Stop, Watch (SPL=1)
PUL read
PUL
PUL write
ILSR2 read
ILSR2
ILSR2 write
Figure 17.4-4 Block Diagram of Pin Related to 16-bit PPG (TRG 0 ~ 7)
Peripheral function input
Peripheral function input enable
0
1
PDR read
PDR
PDR write
In bit operation instruction
DDR read
DDR
DDR write
Stop, Watch (SPL=1)
ILSR3 read
ILSR3
ILSR3 write
Hysteresis
Automotive
1
0
LCD output
LCD enable
Hysteresis
Automotive
CHAPTER 17 16-BIT PPG TIMER
Pull-up
Pin
Selectalbe only
P94 and P95
Pin
281