I 2 C Bus Status Register (Ibsr0) - Fujitsu F2MC-8FX Hardware Manual

2
CHAPTER 22 I C
2
22.5.2 I C Bus Status Register (IBSR0)
The IBSR0 register contains the status of the I
2
I C Bus Status Register (IBSR0)
bit7
Address
BB
0062 IBSR0
H
R/WX
R/WX : Read only (Readable, writting has no effect on operation)
R0/WX : Undefined bit
(Read value is "0", writting has no effect on operation)
- : Unused
: Initial value
386
2
Figure 22.5-4 I
bit6 bit5 bit4 bit3
RSC - LRB TRX
R/WX R0/WX R/WX R/WX
2
C interface.
C Bus Status Register (IBSR0)
bit2 bit1 bit0
AAS GCA BTF
R/WX R/WX R/WX
FBT
0
1
Data received is the first byte (address data)
GCA
0
General call address (00
1
General call address (00
AAS
0
1
TRX
0
1
LRB
0
Acknowledgment detected in ninth shift clock cycle.
1
Acknowledgment not detected in ninth shift clock cycle.
RSC
Repeated start condition detection bit
0
Repeated start condition not detected
1
Repeated start condition detected with bus in use
BB
0
1
Initial value
00000000
B
First byte detection bit
Data received is not the first byte.
General call address detection bit
) not received in slave mode.
H
) received in slave mode.
H
Addressing detection bit
Not addressed in slave mode.
Addressed in slave mode.
Data transfer status bit
Receive mode
Transmit mode
Acknowledge storage bit
Bus busy bit
Bus idle
Bus busy