Lcdc Blinking Setting Registers 1/2 (Lcdcb1/2) - Fujitsu F2MC-8FX Hardware Manual

24.4.4

LCDC Blinking Setting Registers 1/2 (LCDCB1/2)

LCDC blinking setting registers 1/2 (LCDCB1/2) are used to turn blinking on or off
LCDC Blinking Setting Registers 1/2 (LCDCB1/2)
LCDCB1
Address
0FCB
H
LCDCB2
Address
0FCC
H
Sn :SEGn (n=0 to 3)
Cm :COMm (m=0 to 3)
R/W: Readable/writable (Read value is the same as write value)
The blinking function applies to the dots specified by the combinations of SEG0 to SEG3 and
COM0 to COM3.
The blinking interval is selected by the BLSEL bit in LCDC enable register 1 (LCDCE1).
All the segments for which blinking has been turned on blink synchronously.
The setting of each blinking select bit remains in effect when the corresponding bit in display
RAM holds 1.
In product with single clock system, the blinking function is disabled, so LCDCB1/2has no effect.
Figure 24.4-5 LCDC Blinking Setting Registers 1/2 (LCDCB1/2)
bit7 bit6 bit5
S1C3 S1C2 S1C1
R/W R/W R/W
bit7 bit6 bit5
S3C3 S3C2 S3C1
R/W R/W R/W
SEGxx
0
1
bit4 bit3 bit2
S1C0 S0C3 S0C2 S0C1
R/W R/W R/W
bit4 bit3 bit2
S3C0 S2C3 S2C2 S2C1
R/W R/W R/W
Blinking select bit
Blinking OFF
SnCmSEGn/COMm blinking ON
CHAPTER 24 LCD CONTROLLER
bit1 bit0 Initial value
S0C0 00000000
R/W R/W
bit1 bit0 Initial value
S2C0 00000000
R/W R/W
B
B
451