Figure 16.9-2 Operating Diagram of Interval Timer Function (Free-run Mode)
Counter value
FF
H
E0
H
80
H
00
H
T00/01DR value (E0
IF bit
STA bit
Counter value match *
Timer output pin
*: The counter is not cleared and the data register settings are not reloaded into the comparison data latch when a match is detected at each point during activation.
Although the T00/01DR value is modified, it is not updated into the comparison latch.