8/16-Bit Composite Timer 00/01 Data Register (T00Dr/T01Dr) - Fujitsu F2MC-8FX Hardware Manual

16.5.4 8/16-bit Composite Timer 00/01 Data Register
(T00DR/T01DR)
The 8/16-bit composite timer 00/01 data register (T00DR/T01DR) is used to write the
maximum value counted during interval timer or PWM timer operation and to read the
count value during PWC timer or input capture operation. The T00DR and T01DR
registers correspond to timers 00 and 01, respectively.

8/16-bit Composite Timer 00/01 Data Register (T00DR/T01DR)

Figure 16.5-5 8/16-bit Composite Timer 00/01 Data Register (T00DR/T01DR)
Address
0F94 T01DR
H
0F95 T00DR
H
R/W: Readable/writable (Read value is the same as write value)
Interval timer function
The 8/16-bit composite timer 00/01 data register (T00DR/T01DR) is used to set the interval time. When the
timer starts operation (T00CR1/T01CR1:STA = 1), the value of this register is transferred to the latch in the
8-bit comparator and the counter starts counting. When the count value matches the value held in the latch
in the 8-bit comparator, the value of this register is transferred again to the latch and the count value is reset
to "00 " to continue to count.
H
The current count value can be read from this register.
An attempt to write "00
In 16-bit operation, set the upper data to T01DR and lower data to T00DR. And, write and read T01DR and
T00DR in this order.
PWM timer functions (fixed-cycle)
The 8/16-bit composite timer 00/01 data register (T00DR/T01DR) is used to set "H" pulse width time.
When the timer starts operation (T00CR1/T01CR1:STA=1), the value of this register is transferred to the
latch in the 8-bit comparator and the counter starts counting from timer output "H". When the count value
matches the value held in the latch, the timer output becomes "L" and the counter continues to count until
the count value reaches "FF
the latch in the 8-bit comparator and the counter performs the next cycle of counting.
The current value can be read from this register.
In 16-bit operation, set the upper data to T01DR and lower data to T00DR. And, write and read T01DR and
T00DR in this order.
bit7 bit6 bit5
TDR7 TDR6 TDR5 TDR4
R/W R/W R/W
" to this register is disabled in interval timer function.
H
". When an overflow occurs, the value of this register is transferred again to
H
CHAPTER 16 8/16-BIT COMPOSITE TIMER
bit4 bit3 bit2
TDR3 TDR2 TDR1
R/W R/W R/W R/W
bit1 bit0 Initial value
TDR0 00000000
R/W
B
251