Fujitsu F2MC-8FX Hardware Manual page 294

CHAPTER 17 16-BIT PPG TIMER
Block Diagrams of Pins Related to 16-bit PPG
Figure 17.4-1 Block Diagram of Pin Related to 16-bit PPG (PPG0, PPG1)
Peripheral function input enable
Peripheral function output enable
PDR read
PDR write
In bit operation instruction
DDR read
DDR write
PUL read
PUL write
ILSR2 read
ILSR2 write
Figure 17.4-2 Block Diagram of Pin Related to 16-bit PPG (PPG2, PPG3, PPG4, PPG5)
Peripheral function output enable
PDR read
PDR write
In bit operation instruction
DDR read
DDR write
ILSR2 read
ILSR2 write
280
Peripheral function input
Peripheral function output
0
1
PDR
DDR
Stop, Watch (SPL=1)
PUL
ILSR2
Peripheral function output
0
1
PDR
DDR
Stop, Watch (SPL=1)
ILSR2
Hysteresis
Automotive
1
0
Only P12 is
selectable.
Hysteresis
Automotive
1
0
Pull-up
Pin
Pin