Fujitsu F2MC-8FX Hardware Manual page 124

CHAPTER 9 I/O PORT
Block Diagram of Port 1
Peripheral function input enable
PDR read
PDR write
In bit operation instruction
DDR read
DDR write
PUL read
PUL write
ILSR read
ILSR write
ILSR2 read
ILSR2 write
Peripheral function input enable
Peripheral function output enable
PDR read
PDR write
In bit operation instruction
DDR read
DDR write
PUL read
PUL write
ILSR2 read
ILSR2 write
110
Figure 9.3-1 Block Diagram of Port1 (For P10)
Peripheral function input
0
1
PDR
DDR
Stop, Watch (SPL=1)
PUL
ILSR
ILSR2
Figure 9.3-2 Block Diagram of Port1 (For P11 and P12))
Peripheral function input
Peripheral function output
0
1
PDR
DDR
Stop, Watch (SPL=1)
PUL
ILSR2
Hysteresis
Automotive
CMOS
CMOS input level select
Hysteresis input level select
Automotive input level select
Hysteresis
Automotive
1
0
Only P12 is
selectable.
Pull-up
Pin
Pull-up
Pin